Low contamination high density plasma etch chambers and methods for making the same

• US 6,583,064 B2
• Filed: 03/21/2002
• Issued: 06/24/2003
• Est. Priority Date: 03/31/1998
• Status: Expired due to Term

• Current Assignee: Lam Research Corporation
• Original Assignee: Lam Research Corporation
• Inventors: Kennedy, William S., Maraschin, Robert A., Wicker, Thomas E.
• Primary Examiner(s): Lund, Jeffrie R.
• Assistant Examiner(s): Zervigon, Rudy
• Application Number:
  US10/101,737
• Publication Number:
  US 20020102858A1
• Time in Patent Office: 460 Days
• Field of Search: 156/345.48, 156/345.49, 156/345.34, 156/345.37, 118/723.I, 427/534, 427/569, 438/710, 438/792, 438/788, 438/776, 438/771, 438/758
• US Class Current: 438/710
• CPC Class Codes: H01J 2237/022 Avoiding or removing foreign or contaminating particles, debris or deposits on sample or tube
• CPC Class Codes: H01J 37/321 the radio frequency energy being inductively coupled to the plasma
• CPC Class Codes: H01J 37/32477 characterised by the means for protecting vessels or internal parts, e.g. coatings
• CPC Class Codes: Y10S 156/914 Differential etching apparatus including particular materials of construction
• CPC Class Codes: Y10S 156/916 Differential etching apparatus including chamber cleaning means or shield for preventing deposits
• CPC Class Codes: Y10T 428/12347 Plural layers discontinuously bonded [e.g., spot-weld, mechanical fastener, etc.]

Abstract

A plasma processing chamber having a chamber liner and a liner support, the liner support including a flexible wall configured to surround an external surface of the chamber liner, the flexible wall being spaced apart from the wall of the chamber liner. The apparatus can include a heater thermally connected to the liner support so as to thermally conduct heat from the liner support to the chamber liner. The liner support can be made from flexible aluminum material and the chamber liner comprises a ceramic material. The flexible wall can include slots which divide the liner support into a plurality of fingers which enable the flexible wall to absorb thermal stresses.

Claims

1. A method of processing a semiconductor substrate in a plasma processing chamber having a chamber liner and a liner support within an interior of the plasma processing chamber, the liner support including a flexible wall configured to surround an external surfaces of the chamber liner, the flexible wall being spaced apart from the external surface of the chamber liner, wherein a semiconductor wafer is transferred into the chamber and an exposed surface of the substrate is processed with a high density plasma.

2. The method of processing a semiconductor substrate as recited in claim 1, wherein the chamber liner is a ceramic material and the liner support includes an outer support extending between the liner support and a temperature controlled part of the chamber, the outer support being dimensioned to minimize temperature drift of the chamber liner during sequential processing of a batch of semiconductor wafers.

3. The method of processing a semiconductor substrate as recited in claim 1, wherein the chamber liner is a ceramic liner which is removed from the chamber and replaced with another ceramic liner after processing a predetermined number of semiconductor wafers.

4. The method of processing a semiconductor substrate as recited in claim 1, wherein a heater is thermally connected to the liner support so as to thermally conduct beat from the liner support to the chamber liner.

5. The method of processing a semiconductor substrate as recited in claim 1, wherein the flexible wall includes slots which divide the liner support into a plurality of fingers which enable the flexible wall to absorb thermal stresses during processing of the semiconductor wafer.

6. The method of processing a semiconductor substrate as recited in claim 1, a baffle ring is in thermal contact with the chamber liner and the liner support, the baffle ring defining a plasma screen around an electrostatic chuck located in a central portion of the chamber during processing of the semiconductor wafer.

7. The method of processing a semiconductor substrate as recited in claim 1, wherein the chamber liner has low electrical resistivity and provides an RF path to ground during processing of the semiconductor wafer.

8. The method of processing a semiconductor substrate as recited in claim 1, wherein process gas is supplied into the chamber through a gas distribution plate and the semiconductor wafer is supported on an electrostatic chuck.

9. The method of processing a semiconductor substrate as recited in claim 1, wherein an RF energy source inductively couples RF energy through a gas distribution plate and generates the high density plasma in the chamber.

10. The method of processing a semiconductor substrate as recited in claim 1, wherein the RF energy source comprises a planar antenna.

11. The method of processing a semiconductor substrate as recited in claim 1, wherein the liner support further includes an outer support thermally connected to a lower extension of the liner support, the outer support being in thermal contact with a water cooled top plate mounted on the chamber.

12. The method of processing a semiconductor substrate as recited in claim 1, wherein the exposed surface is etched with the high density plasma.

13. The method of processing a semiconductor substrate as recited in claim 1, wherein a cast heater ring is in thermal contact with the liner support, the heater ring including a resistance heated element which heats the liner support so as to thermally control the temperature of the chamber liner.