Virtual ripple generation in switch-mode power supplies

• US 6,583,610 B2
• Filed: 03/12/2001
• Issued: 06/24/2003
• Est. Priority Date: 03/12/2001
• Status: Expired due to Fees

• Current Assignee: Semtech Corporation
• Original Assignee: Semtech Corporation
• Inventors: Groom, Terry J., Pullen, Stuart
• Primary Examiner(s): Sherry, Michael
• Assistant Examiner(s): Laxton, Gary L.
• Application Number:
  US09/804,364
• Publication Number:
  US 20020125872A1
• Time in Patent Office: 834 Days
• Field of Search: 323/224, 323/225, 323/282, 323/283, 323/284, 323/288, 323/271, 323/222
• US Class Current: 323/288
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A system and method provides virtual ripple signal generation for use in voltage regulation applications. Some switch-mode power converters or voltage regulators use output signal ripple to effect voltage regulation. A virtual ripple generator provides this type of voltage regulator with a virtual ripple signal comprising an offset component responsive to actual load voltage, but with a generated AC ripple component of arbitrary magnitude that is independent of actual output signal ripple. Unlike the actual output ripple signal, the generated AC ripple component is not dependent on implementation specifics, such as circuit board layout or output capacitor ESR, and may have its gain set independent of the offset component. The generated AC ripple component is synchronized to the inductor switching actions of the voltage regulator and thus reflects actual inductor phase switching in single and multi-phase regulation applications. Virtual ripple signal generation can include output (load) voltage droop compensation.

Claims

1. A ripple generating circuit for a ripple-mode switching voltage regulator, the ripple generating circuit comprising:

a buffer connected to an output of the voltage regulator providing a feedback signal as a buffered version of a regulated output signal of the voltage regulator; and

a ramp generator to impart an arbitrary-magnitude ripple signal in the feedback signal that is synchronized to a switching cycle of the voltage regulator.

2. The circuit of claim 1 further comprising a DC compensator to compensate the feedback signal for undesired voltage offset in the feedback signal caused by the ramp generator.

3. The circuit of claim 2 wherein the ripple signal is based on the ramp generator sinking a ramp current from the feedback signal, which tends to decrease a signal level of the feedback signal, and further wherein the DC compensator outputs a compensation current proportional to a characteristic of the ramp current to substantially prevent the undesired voltage offset in the feedback signal.

4. The circuit of claim 3 wherein the characteristic of the ramp current is an average current value, and wherein the DC compensator generates the compensation current in proportion to the average current value.

5. The circuit of claim 4 wherein the DC compensator is adapted to output the compensation current at a value that is substantially equal to the ramp current at instants of time substantially coincident with on-switching of at least one switched output phase associated with the voltage regulator.

6. The circuit of claim 2 wherein the DC compensator comprises a low-bandwidth amplifier adapted to provide a compensation signal proportional to a difference between the regulated output signal and a reference signal.

7. The circuit of claim 2 wherein the DC compensator is a low-bandwidth analog amplifier adapted to have a bandwidth significantly lower than a switching frequency of the voltage regulator.

8. The circuit of claim 2 wherein the DC compensator is a low-bandwidth amplifier comprising:

an offset comparator adapted to output a high/low signal by comparing the regulated output signal to a reference signal;

a counter adapted to output a count value responsive to the high/low signal; and

a digital-to-analog converter adapted to output a compensation signal proportionate to the count value provided by the counter.

9. The circuit of claim 8 wherein the counter is gated such that the high/low signal is latched once per switching cycle of the voltage regulator.

10. The circuit of claim 8 wherein a maximum count value of the counter determines a bandwidth of the low-bandwidth amplifier.

11. The circuit of claim 1 wherein the voltage regulator provides a plurality of output phases, each providing a phase output signal, wherein the phase output signals are combined to form the regulated output signal, and wherein the ramp generator comprises a corresponding plurality of ramp generators, each ramp generator synchronized to a respective one of the plurality of output phases.

12. The circuit of claim 11 further comprising a synchronization logic circuit adapted to receive ramp start signals for initiating the plurality of ramp generators synchronously with respective ones of the plurality of output phases.

13. The circuit of claim 12 wherein the synchronization logic circuit is further adapted to prevent more than one of the plurality of ramp generators from being initiated simultaneously.

14. The circuit of claim 1 further comprising a shut-down circuit responsive to a disable signal and adapted to disable operation of the ramp generator.

15. The circuit of claim 14 wherein the shut-down circuit further comprises a bypass switch adapted to provide the regulated output signal of the voltage regulator as the feedback signal when the disable signal is asserted.

16. The circuit of claim 1 wherein the ramp generator comprises:

a ramp circuit adapted to generate an arbitrary ramping voltage responsive to a ramp start signal synchronized to the switching cycle of the voltage regulator; and

an output circuit adapted to sink a ramp current proportional to the ramping voltage to impress the ripple signal in the feedback signal.

17. The circuit of claim 16 wherein the ramp circuit is further adapted to disable the ramp generator responsive to a disable signal.

18. The circuit of claim 16 wherein the ramp circuit includes a ramp adjustment input to control at least one characteristic of the ripple signal imparted to the feedback signal.

19. The circuit of claim 18 wherein the ramp adjustment input is adapted to connect with an external capacitor, such that a capacitance value of the external capacitor controls a magnitude of the ripple signal.

20. The circuit of claim 18 wherein the ramp adjustment input is adapted to connect with an external resistor, such that a resistance value of the external resistor controls a magnitude of the ripple signal.

21. The circuit of claim 16 wherein the ramp circuit generates the ripple signal as a single-slope waveform in a first configuration and generates the ripple signal as a dual-slope waveform in a second configuration, said first configuration corresponding to use of the circuit with a constant on-time controller as the voltage regulator and said second configuration corresponding to use of the circuit with a hysteretic controller as the voltage regulator.

22. The circuit of claim 1 wherein the buffer comprises a voltage follower circuit.

23. The circuit of claim 1 further comprising a droop compensator adapted to impart a voltage offset in the feedback signal that is proportional to a current of the regulated output signal, thereby imparting output voltage droop compensation to the voltage regulator.

24. The circuit of claim 23 wherein an input of the buffer is coupled to the regulated output signal through a series impedance, and further wherein the droop compensator comprises an amplifier adapted to inject a droop current proportional to the current of the regulated output signal into a node connecting the series impedance with the buffer.

25. The circuit of claim 1 wherein the ripple generating circuit comprises an integrated portion of the voltage regulator.

26. The circuit of claim 1 further comprising a coupling capacitor to couple said ramp generator to an output of said buffer.

27. The circuit of claim 26 wherein said ramp generator comprises:

a ramp circuit to generate a ramping voltage signal; and

a follower amplifier to generate said ripple signal as a voltage ripple signal, wherein said voltage ripple signal is coupled through said coupling capacitor to said feedback signal.

28. The circuit of claim 27 wherein said ramp circuit comprises:

a current source to generate a charging current; and

a ramp capacitor to develop said ramping voltage signal based on said charging current.

29. The circuit of claim 26 wherein said buffer comprises:

a buffer amplifier configured as a voltage follower to generate said feedback signal based on buffering said regulated output signal; and

a resistor coupling an output of said buffer amplifier in series to said coupling capacitor.

30. A voltage regulator configured to provide a regulated output signal at a desired voltage, the voltage regulator comprising:

a regulation comparator adapted to generate a switching signal by comparing a regulation feedback signal to a reference signal;

a switching logic circuit adapted to control on/off switching of at least one switched output circuit associated with the voltage regulator responsive to the switching signal to control a voltage of the regulated output signal; and

a virtual ripple generator adapted to generate the regulation feedback signal as a composite signal comprising a buffered version of the regulated output signal and a virtual ripple component with an arbitrary ripple magnitude that is synchronized with a switching cycle of the voltage regulator.

31. The voltage regulator of claim 30 wherein the virtual ripple generator comprises:

a buffer circuit adapted to provide the buffered version of the regulated output signal; and

at least one ramp generator to generate a virtual ripple signal of an arbitrary magnitude for imparting the virtual ripple component to the buffered version of the regulated output signal, thereby forming the regulation feedback signal.

32. The voltage regulator of claim 31 wherein the virtual ripple generator further comprises a DC compensator adapted to compensate the regulation feedback signal for an undesired voltage offset in the regulated output signal otherwise caused by the at least one ramp generator.

33. The voltage regulator of claim 32 wherein the virtual ripple signal is based on the at least one ramp generator sinking ramp current from the regulation feedback signal, which decrease a signal level of the regulation feedback signal, and further wherein the DC compensator outputs a compensation current proportional to a characteristic of the ramp current, thereby substantially preventing the decrease in the signal level of the regulation feedback signal from causing the undesired voltage in the regulated output signal.

34. The voltage regulator of claim 33 wherein the characteristic of the ramp current is an average current value, and wherein the DC compensator generates the compensation current in proportion to the average current value.

35. The voltage regulator of claim 33 wherein the DC compensator is adapted to output the compensation current at a value that is substantially equal to the ramp current at instants of time substantially coincident with the turn-on transitions in the switching cycle of the voltage regulator.

36. The voltage regulator of claim 32 wherein the DC compensator comprises a low-bandwidth amplifier adapted to provide a compensation signal proportional to a difference between the regulated output signal and a reference signal.

37. The voltage regulator of claim 32 wherein the DC compensator is a low-bandwidth analog amplifier adapted to have a bandwidth significantly lower than a switching frequency of the voltage regulator.

38. The voltage regulator of claim 32 wherein the DC compensator is a low-bandwidth amplifier comprising:

an offset comparator adapted to output a high/low signal by comparing the regulated output signal to a reference signal;

a counter adapted to output a count value responsive to the high/low signal; and

a digital-to-analog converter adapted to output a compensating signal proportionate to the count value provided by the counter.

39. The voltage regulator of claim 38 wherein the counter is gated such that the high/low signal is latched once per switching cycle of the voltage regulator.

40. The voltage regulator of claim 38 wherein a maximum count value of the counter determines a bandwidth of the low-bandwidth amplifier.

41. The voltage regulator of claim 30 wherein the voltage regulator provides a plurality of switched output phases, each providing a phase output signal, wherein the phase output signals are combined to form the regulated output signal, and wherein the at least one ramp generator comprises a corresponding plurality of ramp generators, each ramp generator synchronized to a respective one of the plurality of switched output phases.

42. The voltage regulator of claim 41 further comprising a synchronization logic circuit adapted to receive ramp start signals for initiating the plurality of ramp generators synchronously with respective ones of the plurality of switched output phases.

43. The voltage regulator of claim 42 wherein the synchronization logic circuit is further adapted to prevent more than one of the plurality of ramp generators from being initiated simultaneously.

44. The voltage regulator of claim 30 further comprising a shut-down circuit responsive to a disable signal and adapted to disable operation of the virtual ripple generator.

45. The voltage regulator of claim 44 wherein the shut-down circuit further comprises a bypass switch adapted to provide the regulated output signal as the regulation feedback signal when the virtual ripple generator is disabled.

46. The voltage regulator of claim 30 wherein the virtual ripple generator comprises:

a buffer to generate a buffered version of the regulated output signal as the regulation feedback signal;

a ramp circuit adapted to generate a ramping voltage responsive to a ramp start signal synchronized to the switching cycle of the voltage regulator; and

an output circuit adapted to sink a ramp current proportional to the ramping voltage from the regulation feedback signal to impart the virtual ripple component in the regulation feedback signal.

47. The voltage regulator of claim 46 wherein the virtual ripple generator is further adapted to disable the ramp circuit responsive to a disable signal.

48. The voltage regulator of claim 46 wherein the ramp circuit includes a ramp adjustment input adapted to control the arbitrary magnitude of the virtual ripple component.

49. The voltage regulator of claim 30 further comprising a droop compensator adapted to impart a voltage offset in the regulation feedback signal that is proportional to a current of the regulated output signal, thereby imparting output voltage droop compensation to the voltage regulator via the virtual ripple generator.

50. The voltage regulator of claim 49 wherein the droop compensator comprises an amplifier adapted to provide a droop current proportional to the current of the regulated output signal.

51. The voltage regulator of claim 30 wherein said virtual ripple generator comprises:

a buffer connected to an output of the voltage regulator, said buffer providing the regulation feedback signal as a buffered version of the regulated output signal; and

a ramp generator to impart the ripple component to the regulation feedback signal.

52. The voltage regulator of claim 51 wherein said buffer comprises:

a voltage follower amplifier to generate the regulation feedback signal as a buffered version of the regulated output signal; and

a resistor placed in series with an output of said voltage follower amplifier to provide a controlled source resistance for said buffer.

53. The voltage regulator of claim 52 wherein said ramp generator comprises:

a ramp circuit to generate a ramping voltage signal;

a follower amplifier to generate said ripple component as a voltage ripple signal; and

a coupling capacitor to couple said voltage ripple signal to said regulation feedback signal provided by said buffer.

54. The voltage regulator of claim 53 wherein said ramp circuit comprises:

a current source to generate an arbitrary charging current; and

a ramp capacitor to develop said ramping voltage signal based on said charging current.

55. A method of generating a virtual ripple signal for use in ripple-mode voltage regulation, the method comprising:

generating a regulator feedback signal by buffering a regulated output signal of a ripple-mode voltage regulator; and

imparting a ripple signal of an arbitrary magnitude to the regulator feedback signal that is synchronized with a switching cycle of the voltage regulator.

56. The method of claim 55 wherein imparting a ripple signal of an arbitrary magnitude to the regulator feedback signal that is synchronized with the switching cycle of the voltage regulator comprises:

generating a ramp signal initiated synchronously with the switching cycle of the voltage regulator; and

adjusting the regulator feedback signal in proportion to the ramp signal, thereby imparting the ripple signal to the regulator feedback signal.

57. The method of claim 56 wherein generating a ramp signal initiated synchronously with the switching cycle of the voltage regulator comprises generating a ramping current, and further wherein adjusting the regulator feedback signal in proportion to the ramp signal comprises sourcing the ramping current from the regulator feedback signal through a known impedance to impart the ripple signal to the regulator feedback signal.

58. The method of claim 55 wherein generating a regulator feedback signal responsive to a regulated output signal of a voltage regulator comprises buffering the regulated output signal of the switch-mode voltage regulator to form a buffered version of the regulated output signal, and then imparting the ripple signal to the buffered version of the regulated output signal.

59. The method of claim 55 wherein the regulated output signal of the voltage regulator is a composite of a plurality of output signals provided by a plurality of output phases of the voltage regulator, and further comprising generating a ramp current for each one of the plurality of output phases, each ramp current synchronized to a respective one of the output phases, wherein the ramp currents form the ripple signal and are operative to impart ripple to the regulator feedback signal.

60. The method of claim 59 further comprising controlling ramp current initiation signals that synchronize each ramp current with the respective one of the plurality of output phases such that no more than one of the ramp currents is initiated at a time.

61. The method of claim 55 wherein imparting a ripple signal of an arbitrary magnitude to the regulator feedback signal that is synchronized with a switching cycle of the voltage regulator causes an undesirable voltage offset in the regulator output signal, and further comprising compensating the regulator feedback signal to substantially prevent the undesirable offset voltage.

62. The method of claim 61 wherein compensating the regulator feedback signal to substantially prevent the undesirable voltage offset comprises combining a compensation signal with the regulator feedback signal that is substantially equal to an average value of the ripple signal.

63. The method of claim 61 wherein compensating the regulator feedback signal to substantially prevent the undesirable voltage offset comprises adding a compensation signal proportionate to a characteristic of the ripple signal to the regulator feedback signal.

64. The method of claim 61 wherein the ripple signal comprises at least one current ramp signal operative to pull down a voltage level of the regulator feedback signal thereby imparting the ripple signal, and further wherein the compensation signal is a compensation current substantially equal to the at least one current ramp signal at instants of time substantially coincident with turn-on times in the switching cycle of the voltage regulator.

65. The method of claim 55 further comprising:

sensing an output current of the regulated output signal; and

imparting a droop offset proportional to the output current to the regulator feedback signal to cause the voltage regulator to implement voltage droop in the regulated output signal as a function of the output current.

66. The method of claim 55 wherein imparting a ripple signal of an arbitrary magnitude synchronized with a switching cycle of the switch-mode voltage regulator to the regulator feedback signal comprises:

generating a ramping signal of an arbitrary magnitude; and

AC coupling said ramping signal to the regulator feedback signal to impress said ripple signal in said regulator feedback signal.