Apparatus and method for a compact class AB turn-around stage with low noise, low offset, and low power consumption
First Claim
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1. A class AB amplifier that operates from a high power supply and a low power supply, comprising:
- a first transistor having a gate terminal that is coupled to a first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled a second node;
a second transistor having a gate terminal that is coupled to the first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to a third node;
a third transistor having a gate terminal that is coupled to a fourth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to a fifth node;
a fourth transistor having a gate terminal that is coupled to the fourth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to the first node;
a fifth transistor having a gate terminal that is coupled to a sixth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to the sixth node;
a sixth transistor having a gate terminal that is coupled to the sixth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to a seventh node;
a seventh transistor having a gate terminal that is coupled to an eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a ninth node;
an eighth transistor having a gate terminal that is coupled to the eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a tenth node;
a ninth transistor having a gate terminal that is coupled to an eleventh node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the sixth node;
a tenth transistor having a gate terminal that is coupled to the eleventh node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to the eighth node;
an eleventh transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the fifth node;
a twelfth transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to a twelfth node;
a floating current source that is coupled between the first node and the eighth node; and
a resistive circuit that is coupled between the seventh node and the twelfth node, wherein the second and third nodes are arranged to operate as inputs to a class AB turn-around stage, and the seventh and twelfth nodes operate as drive points for an output of the class AB turn-around stage.
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Abstract
A turn-around stage is provided that accepts the full current swing from an input stage while maintaining a low quiescent current. The circuitry provides Class AB operation with quiescent currents that are significantly less than the maximum signal current so that overall power consumption is significantly reduced. Also, the amount of noise and offset contributions of the circuit are reduced by reducing the transconductances associated with transistors included in the turn-around stage.
24 Citations
10 Claims
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1. A class AB amplifier that operates from a high power supply and a low power supply, comprising:
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a first transistor having a gate terminal that is coupled to a first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled a second node;
a second transistor having a gate terminal that is coupled to the first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to a third node;
a third transistor having a gate terminal that is coupled to a fourth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to a fifth node;
a fourth transistor having a gate terminal that is coupled to the fourth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to the first node;
a fifth transistor having a gate terminal that is coupled to a sixth node, a source terminal that is coupled to the second node, and a drain terminal that is coupled to the sixth node;
a sixth transistor having a gate terminal that is coupled to the sixth node, a source terminal that is coupled to the third node, and a drain terminal that is coupled to a seventh node;
a seventh transistor having a gate terminal that is coupled to an eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a ninth node;
an eighth transistor having a gate terminal that is coupled to the eighth node, a source terminal that is coupled to the high power supply, and a drain terminal that is coupled to a tenth node;
a ninth transistor having a gate terminal that is coupled to an eleventh node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the sixth node;
a tenth transistor having a gate terminal that is coupled to the eleventh node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to the eighth node;
an eleventh transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the ninth node, and a drain terminal that is coupled to the fifth node;
a twelfth transistor having a gate terminal that is coupled to the fifth node, a source terminal that is coupled to the tenth node, and a drain terminal that is coupled to a twelfth node;
a floating current source that is coupled between the first node and the eighth node; and
a resistive circuit that is coupled between the seventh node and the twelfth node, wherein the second and third nodes are arranged to operate as inputs to a class AB turn-around stage, and the seventh and twelfth nodes operate as drive points for an output of the class AB turn-around stage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
a first output transistor having a gate that is coupled to the seventh node, a source that is coupled the lower power supply, and a drain that is coupled to an output terminal such that the first output transistor pulls current from the output terminal when a first source current is driven into the third node; and
a second output transistor having a gate that is coupled to the twelfth node, a source that is coupled to the high power supply, and a drain that coupled to the output terminal such that the second output transistor pushes current into the output when a second source current is driven into the second node.
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4. The class AB amplifier of claim 1, wherein the floating current source comprises:
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a single-ended current source coupled between the high power supply and a thirteenth node;
a thirteenth transistor having a gate terminal that is coupled to the first node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to a fourteenth node;
a fourteenth transistor having a gate terminal that is coupled to the fourteenth node, a source terminal that is coupled to the low power supply, and a drain terminal that is coupled to the thirteenth node;
a fifteenth transistor having a gate terminal that is coupled to the thirteenth node, a source terminal that is coupled to the fourteenth node, and a drain terminal that is coupled to the high power supply; and
a sixteenth transistor having a gate terminal that is coupled to the thirteenth node, a source terminal that is coupled to the first node, and a drain terminal that is coupled to the eighth node such that a voltage at the gate of the sixteenth transistor changes when a voltage at the source of the sixteenth transistor changes.
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5. The class AB amplifier of claim 1, further comprising:
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a first capacitor that is coupled between the first node and the sixth node; and
a second capacitor coupled between the fifth node and the eighth node such that the first and second capacitors operate to provide stability for the class AB turn-around stage.
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6. The class AB amplifier of claim 1, wherein the resistive circuit further comprises:
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a thirteenth transistor having a gate terminal that is biased at a first voltage, a source terminal that is coupled to the seventh node, and a drain terminal that is coupled to the twelfth node; and
a fourteenth transistor having a gate terminal that is biased to a second voltage, a source terminal that is coupled to the twelfth node, and a drain terminal that is coupled to the seventh node.
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7. The class AB amplifier of claim 1, wherein the first, second, third, fourth, fifth, and sixth transistors are NMOS transistors, and the seventh, eighth, ninth, tenth, eleventh, and twelfth transistors are PMOS transistors.
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8. The class AB amplifier of claim 1, further comprising:
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a differential input stage that is arranged to route a first source current to the second node and a second source current to the third node in response to a differential input signal;
a first output transistor having a gate that is coupled to the seventh node, a source that is coupled to the low power supply, and a drain that is coupled to an output terminal such that the first output transistor pulls current from the output terminal when a first source current is injected into the third node; and
a second output transistor having a gate that is coupled to the twelfth node, a source that is coupled to the high power supply, and a drain that is coupled to the output terminal such that the second output transistor pushes current into the output when a second source current is injected into the second node.
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9. The class AB amplifier of claim 1, further comprising a feedback loop that includes the first, fourth, fifth, and sixth transistors and is arranged to hold the second node constant when a first source current is injected into the third node.
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10. The class AB amplifier of claim 1, further comprising a feedback loop that includes the eighth and tenth transistors and is arranged to hold the tenth node constant when a first source current is injected into the third node.
Specification