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Timing control for input/output testability

  • US 6,584,591 B1
  • Filed: 05/05/2000
  • Issued: 06/24/2003
  • Est. Priority Date: 12/24/1997
  • Status: Expired due to Fees
First Claim
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1. A method comprising:

  • performing the following in a source synchronous interface producing a binary output signal whose duty cycle varies according to a phase difference between a signal and a delayed signal;

    filtering the binary output signal to produce a filtered signal; and

    converting the filtered signal to produce a digital indicator of a value of the duty cycle, the digital indicator being a digital number representing the phase difference.

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