Start-up circuit and control for high power isolated boost DC/DC converters

• US 6,587,356 B2
• Filed: 05/24/2001
• Issued: 07/01/2003
• Est. Priority Date: 02/23/2001
• Status: Expired due to Term

• Current Assignee: Ford Global Company
• Original Assignee: Virginia Tech Intellectual Properties, Inc.
• Inventors: Lai, Jin-Sheng, Zhu, Lizhi, Lee, Fred C.
• Primary Examiner(s): Sherry, Michael
• Assistant Examiner(s): Laxton, Gary L.
• Application Number:
  US09/866,304
• Publication Number:
  US 20020159280A1
• Time in Patent Office: 768 Days
• Field of Search: 363/15-17, 363/49, 363/98, 363/132, 363/55, 363/56.01, 363/56.02, 363/56.05, 363/56.06, 363/56.08, 363/56.12, 323/908, 323/901, 361/93.9, 361/94, 361/58, 361/57
• US Class Current: 363/17
• CPC Class Codes: H02M 1/34 Snubber circuits
• CPC Class Codes: H02M 1/342 Active non-dissipative snubbers
• CPC Class Codes: H02M 3/3376 with automatic control of output voltage or current
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y10S 323/908 Inrush current limiters

Abstract

The invention is a scheme for high power isolated full-bridge boost DC/DC converters to minimize the effect of in-rush current during start-up. A single pulse width modulation controller (PWM) is possible for the present invention for not only start-up but also normal boost modes. A primary circuit can have a clamping switch or at least two choke diodes. The choke diode can include “push-pull” and “L”-type configurations. A resistor can be used to dissipate energy clamped from the voltage spike. A startup circuit can be used to eliminate the in-rush current experienced during start-up. The proposed start-up schemes have been experimentally verified using a 1.6 kW, 12V/288 V prototype. Since the present invention eliminates the need to match characteristics of multiple controllers, it significantly reduces the cost associated with implementing this type of technology.

Claims

1. A system to active-clamp an isolated high power boost converter, the system comprising:

a primary circuit comprising at least one bridge leg component;

a secondary circuit comprising at least two bridge leg components;

a transformer coupling the primary circuit and the secondary circuit;

the primary circuit further comprising a clamping switch; and

a start-up circuit comprising a high frequency rectifier diode, a high frequency capacitor electrically coupled across the high frequency rectifier diode, and an output capacitor electrically coupled across an output of the secondary circuit, whereby the at least one bridge leg component of the primary circuit is protected from in-rush current in a start-up mode.

2. The system of claim 1 wherein the bridge leg components comprise switches.

3. The system of claim 1 wherein the bridge leg components comprise diodes.

4. The system of claim 1 wherein the primary circuit further comprises at least two clamping diodes in a push-pull configuration.

5. The system of claim 1 wherein the primary circuit further comprises at least two clamping diodes in an L-type configuration.

6. The system of claim 1 wherein the system is one directional.

7. The system of claim 1 wherein the system is bi-directional.

8. The system of claim 1, further comprising:

a single pulse width modulation (PWM) controller controllingly coupled to at least the one bridge leg component of the primary circuit.

9. A system to active clamp isolated high power boost converters, the system comprising:

a primary circuit comprising at least two bridge leg components;

a secondary circuit comprising at least two bridge leg components;

a transformer coupling the primary circuit and the secondary circuit;

the primary circuit further comprising a clamping switch; and

a start-up circuit comprising a high frequency rectifier diode, a high frequency capacitor electrically coupled across the high frequency rectifier diode, and an output capacitor electrically coupled across an output of the secondary circuit, whereby bridge leg components of the primary circuit are protected from in-rush current in a start-up mode, wherein the primary circuit further comprises a snubber resistor, whereby clamping energy is dissipated.

10. A method to active-clamp isolated high power boost converters comprised of a transformer connected to a primary circuit and a secondary circuit, comprising:

turning off at least two primary circuit switches during a start-up mode;

activating a start-up circuit;

clamping the primary circuit during the start-up mode using a clamping switch; and

snubbing energy, whereby the at least two primary circuit switches are protected from voltage spikes in the start-up mode.

11. The method of claim 10 wherein snubbing energy comprises passing a current through a resistor.

12. The method of claim 10 wherein the system is one directional.

13. The method of claim 10 wherein the system is bi-directional.

14. A boost-mode operation timing control method to determine switching of primary side circuit controllers by a first and a second set of duty cycle control signals, the method comprising:

turning on a first pair of primary side diagonal bridge leg components during normal boost-mode operation at a rise edge of a first pulse width modulation (PWM) signal;

turning off the first pair of primary side diagonal bridge leg components during normal boost-mode operation at a fall edge of a second PWM signal;

turning on a second pair of primary side diagonal bridge leg components during normal boost-mode operation at a rise edge of the second PWM signal;

turning off the second pair of primary side diagonal bridge leg components during normal boost-mode operation at a fall edge of the first PWM signal;

turning on all of the primary side diagonal bridge leg components when at least one duty cycle control signal is high;

alternating between turning off the first pair of primary side diagonal bridge leg components and turning off the second pair of primary side diagonal bridge leg components in subsequent intervals when both duty cycle control signals are low.

15. The method of claim 14 wherein the primary side diagonal bridge leg components are switches.

16. The method of claim 14, wherein the primary side diagonal bridge leg components are switches comprising respective anti-parallel diodes thereacross.

17. The method of claim 14 wherein one pair of primary side diagonal bridge leg components comprises two diagonally located switches.

18. A method of operating a converter comprising two pairs of diagonally opposed switching elements, the method comprising:

operating in a startup mode during a first time, wherein operating in the startup mode comprises activating both pairs of diagonally opposed switching elements when either of a first and a second pulse width modulated signal is in a first state and deactivating both pairs of diagonally opposed switching elements when neither of the first and the second pulse width modulated signals is in the first state; and

operating in a boost mode during a second time.

19. The method of claim 18 wherein operating in the boost mode comprises activating both pairs of diagonally opposed switching elements when either of the first and the second pulse modulated signals enters the first state, and deactivating alternating ones of the pairs of diagonally opposed switching elements each time that either of the first and the second pulse width modulated signals leaves the first state.

20. The method of claim 18, further comprising:

producing the first and the second pulse width modulated signals from a single pulse width modulated controller.

21. The method of claim 18, further comprising:

producing the first and the second pulse width modulated signals from a single pulse width modulation controller, wherein the second pulse width modulated signal is 180 degrees out of phase with the first pulse width modulated signal.

22. The method of claim 18 wherein the first state is a logical HIGH state and activating the pairs of diagonally opposed switching elements comprises placing each of the diagonally opposed switching elements of the pair in an ON state.

23. The method of claim 18, further comprising:

determining a duty cycle of the converter; and

switching between the startup mode and the boost mode when the duty cycle exceeds a threshold duty cycle.