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Directory-based cache coherency system supporting multiple instruction processor and input/output caches

  • US 6,587,931 B1
  • Filed: 12/31/1997
  • Issued: 07/01/2003
  • Est. Priority Date: 12/31/1997
  • Status: Expired due to Term
First Claim
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1. In a data processing system having a main memory for storing addressable data signals, the main memory having at least a portion coupled to and shared by multiple requesters including one or more requesters of a first type and one or more requesters of a second type, each of the requesters having local memory capable of storing valid copies of requested ones of the data signals stored in the shared main memory, the improvement, comprising:

  • a coherency system having a central directory storage unit to store associated status bits associated with selected ones of the data signals, said associated status bits indicating the identity of the various requesters storing valid copies of associated requested ones of the data signals, said status bits further indicating the type of access privileges that are associated with each of said valid copies of said associated requested ones of the data signals, said type of access privileges being selected from a first set of access privileges for the data signals stored by one or more of the first type of requesters and said type of access privileges being selected from a different second set of access privileges for copies of the data signals stored by one or more of the second type of requesters.

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