Intelligent binning for electrically repairable semiconductor chips

• US 6,587,980 B2
• Filed: 08/28/2002
• Issued: 07/01/2003
• Est. Priority Date: 08/02/1996
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Debenham, Brett M.
• Primary Examiner(s): Chung, Phung M.
• Application Number:
  US10/231,728
• Publication Number:
  US 20030005377A1
• Time in Patent Office: 307 Days
• Field of Search: 714/724, 714/704
• US Class Current: 714/724
• CPC Class Codes: G01R 31/01 Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station testing of cables continuously passing the testing apparatus G01R31/59; testing dielectric strength or breakdown voltage G01R31/12
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: G01R 31/31718 Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis mechanical aspects G01R31/2808, G01R31/2851
• CPC Class Codes: G01R 31/319 Tester hardware, i.e. output processing circuits
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/56 External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Abstract

The present invention relates to a system and method for testing one or more semiconductor devices (e.g., packaged chips). Test equipment performs at least tests of a first type on the semiconductor device and identifies failures in the semiconductor device, if any. A number of failures is determined. In the case where there are some failures, decision circuitry determines whether it is more efficient to repeat the tests or repair the semiconductor device, if it is repairable.

Claims

1. A system for semiconductor devices comprising:

testing apparatus for performing at least one test of a first type on at least one semiconductor device consisting of a semiconductor device for identifying one or more types of failures in the at least one semiconductor device, the testing apparatus including a support for supporting a semiconductor device under test;

processing circuitry for communicating with the testing apparatus and for determining at least one type of failure of a number of the identified types of failures, the processing circuitry providing at least one signal indicative of the at least one type of failure; and

decision circuitry for receiving the at least one signal indicative of the at least one type of failure of the number of the identified types of failures and for considering the at least one type of failure of the number of the identified types of failures in one of designating the at least one semiconductor device for an additional procedure, for designating the at least one semiconductor device for repair, and for designating the at least one semiconductor device for additional tests of the first type, the decision circuitry for designating the at least one semiconductor device for the additional procedure if the at least one type of failure of the number of the identified types of failures is within a first number set, designating the at least one semiconductor device for repair if the number of the identified types of failures is within a second number set, and determining when the at least one semiconductor device is repairable.

2. The system of claim 1, wherein the support supports other semiconductor devices to be tested by the testing apparatus.

3. The system of claim 2, wherein the at least one semiconductor device includes leads and the support includes sockets for receiving the leads, an electrical connection being made between the testing apparatus and the sockets.

4. The system of claim 1, wherein the decision circuitry designates the at least one semiconductor device for the additional tests of the first type if the number of the identified types of failures is within a third number set.

5. The system of claim 4, wherein the first number set includes only zero, the second number set includes numbers greater than zero and less than a threshold, and the third number set includes numbers equal to or greater than the threshold.

6. The system of claim 4, wherein the at least one semiconductor device is rejected if the number of the identified types of failures is within the second number set and the at least one semiconductor device is not repairable.

7. The system of claim 4, wherein the additional tests of the first type are performed, failures in the at least one semiconductor device are re-identified and a number of re-identified types of failures are determined, with the decision circuitry subsequently:

designating the at least one semiconductor device for the additional procedure when the number of the re-identified types of failures is within a fourth number set;

designating the at least one semiconductor device for repair when the number of the re-identified types of failures is within a fifth number set; and

designating the at least one semiconductor device for the additional tests of the first type when the number of the re-identified types of failures is within a sixth number set;

wherein the decision circuitry repeats such designations until alternately the number of the re-identified types of failures is within the fourth number set, the at least one semiconductor device is repairable and the number of the re-identified types of failures is within the fifth number set, or the additional tests of the first type have been performed a predetermined number of times and the number of the re-identified types of failures is within the sixth number set.

8. The system of claim 7, wherein values of the fifth and sixth number sets change.

9. The system of claim 7, wherein the additional procedure designated by the decision circuitry includes:

designating the at least one semiconductor device for tests of a second type to the re-identify types of failures in the at least one semiconductor device and determine the number of re-identified types of failures;

designating the at least one semiconductor device for a further procedure when the number of the re-identified types of failures is within a seventh number set;

designating the at least one semiconductor device for repair when the number of the re-identified types of failures is within an eighth number set; and

the testing apparatus performing additional tests of the second type on the at least one semiconductor device when the number of the re-identified types of failures is within a ninth number set.

10. The system of claim 9, wherein the at least one test of the first type is performed in a temperature-regulated chamber and wherein the tests of the second type are performed in the temperature-regulated chamber.

11. The system of claim 1, wherein the processing circuitry is located proximate to the testing apparatus.

12. The system of claim 1, wherein the processing circuitry is located remote from the testing apparatus.

13. The system of claim 1, further comprising:

a pass bin into which the at least one semiconductor device is relocated if the at least one semiconductor device is designated for the additional procedure; and

a repair bin into which the at least one semiconductor device is relocated if the at least one semiconductor device is designated for repair.

14. The system of claim 13, further comprising:

a reject bin into which the at least one semiconductor device is relocated is determined to be nonrepairable.

15. The system of claim 1, further comprising:

a system controller including the decision circuitry; and

a repair station controlled by the decision circuitry of the system controller.

16. The system of claim 1, further comprising:

a repair station, and wherein subsequent to the decision circuitry designating the at least one semiconductor device for repair, the decision circuitry determines whether the at least one semiconductor device is repairable and, if the at least one semiconductor device is repairable, the repair station repairs the at least one semiconductor device.

17. The system of claim 1, wherein the testing apparatus includes repair circuitry for performing a repair on the at least one semiconductor device when the at least one semiconductor device is designated for repair and is determined to be repairable.

18. The system of claim 1, wherein the at least one semiconductor device is binned based upon the number of the identified types of failures.

19. The system of claim 1, wherein the identified types of failures include failures of different classes in which the number of the identified types of failures is a number of total failures of all classes, and the decision circuitry considers failures of different classes in determining whether to designate the at least one semiconductor device for the additional procedure, designate the at least one semiconductor device for repair, or perform the additional tests of the first type.

20. The system of claim 1, wherein the tests of the first type detect certain defects in the at least one semiconductor device which are not classified as examples of the identified types of failures and, therefore, do not contribute to the number of the identified types of failures.

21. The system of claim 1, wherein the additional procedure includes transporting the at least one semiconductor device to a predetermined location.

22. The system of claim 1, further comprising:

a temperature-regulated chamber in which tests of the first type are performed.

23. The system of claim 1, further comprising:

a first temperature-regulated chamber in which tests of the first type are performed; and

a second temperature-regulated chamber in which the additional procedure is performed.

24. The system of claim 1, wherein the testing apparatus includes probes, and electrical connection is made between the probes and the at least one semiconductor device.

25. The system of claim 1, wherein tests of the first type include:

subjecting the at least one semiconductor device to various temperatures in a first range of temperatures while monitoring electrical signals on the at least one semiconductor device; and

the additional procedure includes subjecting the at least one semiconductor device to various temperatures in a second range of temperatures while monitoring the electrical signals on the at least one semiconductor device.

26. The system of claim 25, wherein the first range of temperatures and the second range of temperatures are substantially distinct ranges.

27. The system of claim 1, wherein the at least one semiconductor device comprises a chip in wafer form.

28. The system of claim 1, wherein the at least one semiconductor device comprises a packaged chip including a package and leads.

29. The system of claim 1, wherein tests of the first type and the additional tests of the first type are both of the first type, but not identical.

30. The system of claim 1, wherein the decision circuitry includes:

a testing controller to control tests of the first type; and

a data analyzer receiving data from the at least one test of the first type and determining one of designating the at least one semiconductor device for the additional procedure, designating the at least one semiconductor device for repair, and performing the additional tests of the first type on the at least one semiconductor device.

31. The system of claim 30, wherein the testing controller and the data analyzer are remotely located from each other.

32. A system for testing at least one semiconductor device comprising:

apparatus for performing tests of a first type on the at least one semiconductor device, for identifying at least two types of failures in the at least one semiconductor device, and for

determining at least one failure of a number of the identified at least two types of failures, the test apparatus;

designating the at least one semiconductor device for an additional procedure when the number of the identified at least two types of failures is within a first number set;

designating the at least one semiconductor device for repair when the number of the identified at least two types of failures is within a second number set;

determining when the at least one semiconductor device is repairable; and

designating the at least one semiconductor device for additional tests of the first type when the number of the identified at least two types of failures is within a third number set.

33. A system for a plurality of semiconductor devices comprising:

equipment for performing at least three tests of a plurality of tests of a first type on at least one semiconductor device to identify at least one type of failure of a number of types of failures in the at least one semiconductor device;

processing circuitry for communicating with the test equipment, determining the at least one type of failure of the number of types of failures, and providing signals indicative thereof; and

decision circuitry for receiving the signals indicative of the at least one type of failure of the number of types of failures, the decision circuitry for determining the number of types of failures and performing one of designating the at least one semiconductor device for an additional procedure, designating the at least one semiconductor device for repair, determining when the at least one semiconductor device is repairable, and designating the at least one semiconductor device for additional tests of the first type, the decision circuitry for classifying types of failures by class and numbers of the identified at least one type of failure, a total number of identified types of failures equaling a sum of at least one identified type of failure for each class, and the decision circuitry for considering the total number of identified types of failures and the number of identified types of failures in at least one of the classes of types of failures.

34. A test for a plurality of semiconductor devices comprising:

equipment connected to at least one semiconductor device of the plurality of semiconductor devices for performing tests of a first type on the at least one semiconductor device for identifying at least two types of failures of a plurality of types of failures in the at least one semiconductor device;

circuitry for communicating with the test equipment determining a total number of identified types of failures and classifying the identified types of failures by a class and a number for each class determined, the total number of identified types of failures equaling a sum of the identified types of failures for each class; and

circuitry for designating the at least one semiconductor device for an additional procedure when the total number of the identified types of failures is within a first number set, the circuitry for designating the at least one semiconductor device for repair when the total number of identified types of failures is within a second number set and a number of identified types of failures in a predetermined class is not within an auxiliary number set, the circuitry for determining when the at least one semiconductor device is repairable, and the decision circuitry for performing additional tests of the first type on the at least one semiconductor device when one of the total number of the identified types of failures is within a third number set and the number of identified types of failures in the predetermined class is within the auxiliary number set.

35. A method for a plurality of semiconductor devices comprising:

utilizing a processing circuitry for performing tests of a first type on the semiconductor devices to identify types of failures in the semiconductor devices;

determining a number of the identified types of failures;

designating a semiconductor device having at least one identified type of failure for an additional procedure when the number of the identified types of failures is within a first number set;

determining if the number of the identified types of failures is within a second number set;

repairing the semiconductor device when the number of the identified types of failures is within the second number set;

performing other tests of the first type on the semiconductor device when the number of the identified types of failures is within a third number set; and

determining when a semiconductor device of the plurality of semiconductor devices is repairable.

36. The method of claim 35, wherein the other tests of the first type are performed, types of failures in the semiconductor device are re-identified and a number of re-identified types of failures are determined, further comprising:

designating a semiconductor device being ready for the additional procedure when the number of the re-identified types of failures is within a fourth number set;

repairing the semiconductor device when the number of the re-identified types of failures is within a fifth number set; and

performing the other tests of the first type on the semiconductor device when the number of the re-identified types of failures is within a sixth number set;

wherein the designating, repairing, and performing are repeated until one of the number of the re-identified types of failures is within the fourth number set, the semiconductor device is repairable and the number of the re-identified types of failures is within the fifth number set, and the other tests of the first type have been performed a predetermined number of times and the number of re-identified types of failures is within the sixth number set.

37. The method of claim 36, wherein the tests of the first type and the other tests of the first type are each substantially performed in a temperature-regulated chamber.

38. The method of claim 36, wherein the additional procedure includes:

performing tests of a second type on the semiconductor device re-identifying types of failures in the semiconductor device and determining the number of re-identified types of failures;

designating the semiconductor device for a further procedure when the number of the re-identified types of failures is within a seventh number set;

repairing the semiconductor device when the number of the re-identified types of failures is within an eighth number set; and

performing additional tests of the second type on the semiconductor device when the number of the re-identified types of failures is within a ninth number set.

39. The method of claim 38, wherein the seventh, eighth, and ninth number sets are substantially identical to the first, second, and third number sets, respectively.

40. The method of claim 38, wherein the tests of the first type include a hot sort procedure and wherein the tests of the second type include a cold final procedure.