Method for filling a wafer through-via with a conductive material

• US 6,589,594 B1
• Filed: 08/31/2000
• Issued: 07/08/2003
• Est. Priority Date: 08/31/2000
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Hembree, David R.
• Primary Examiner(s): Ball, Michael W.
• Assistant Examiner(s): Haran, John T.
• Application Number:
  US09/653,173
• Time in Patent Office: 1,041 Days
• Field of Search: 427/97, 438/672, 438/675, 228/179.1, 228/180.21, 228/246, 228/247, 298/40, 298/52, 297/39, 297/40, 257/778, 257/779
• US Class Current: 438/106
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 3/4038 Through-connections; Vertical interconnect access [VIA] connections H05K3/403, H05K3/42 take precedence
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method for filling a via formed through a silicon wafer is disclosed. The method entails mounting the silicon wafer on a mounting substrate and depositing either molten or solid balls of a conductive material into the via. The deposited conductive material may be reflowed to provide electrical contact with other components on the surface of wafer.

Claims

1. A process for filling a via with a conductive material, the process comprising the steps of:

providing a silicon wafer with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned such that the through-via is located in line with the cavity;

positioning a solder jet nozzle in line with the through-via; and

extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills the through-via and the cavity in the mounting substrate to form a conductive via.

2. The process for filling a through-via of claim 1 wherein the silicon wafer has a thickness of at least about 28 mil.

3. The process for filling a through-via of claim 1 wherein the solder jet nozzle comprises a piezoelectric pressure inducer.

4. The process for filling a through-via of claim 1 further comprising the step of:

reflowing the conductive material to fill the via.

5. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer having a first surface and a second surface generally opposed to each other with at least one through-via, wherein the first surface comprises an electrical interconnect;

mounting the silicon wafer onto a surface of a mounting substrate such that the second surface of the silicon wafer is in contact with the surface of the mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned such that the through-via is located in line with the cavity;

positioning a device for depositing balls of molten material in line with the through-via; and

extruding a liquid conductive material through the solder jet nozzle such that the conductive material fills both the through-via and the cavity in the mounting substrate and the conductive material wets the interconnect to form a conductive via.

6. The process for filling a through-via of claim 5 wherein the silicon wafer has a thickness of at least about 6 mil.

7. The process for filling a through-via of claim 5 wherein the device for depositing balls is a solder jet nozzle.

8. The process for filling a via of claim 5, further comprising, after the step of extruding the conductive material, the step of:

reflowing the conductive material to fill the via.

28. The process of claim 7 wherein the solder jet nozzle comprises a piezoelectric pressure inducer.

9. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer having a first surface and a second surface, with at least one via extending therethrough from the first surface to the second surface;

mounting the silicon wafer to a mounting substrate;

providing one or more discrete portions of a conductive material;

depositing conductive material portions in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via to form a conductive via.

10. The process for filling a through-via of claim 9 wherein the silicon wafer has a thickness of at least about 6 mil.

11. The process for filling a through-via of claim 9 wherein the through-via has a diameter of at least about 10 micrometers.

12. The process for filling a through-via of claim 9 wherein the via has a diameter up to about 15 mil.

13. The process for filling a through-via of claim 10 wherein the via has a size up to about 6 mil.

14. The process for filling a through-via of claim 9 wherein the conductive material comprises solder or a conductive polymer.

15. The process for filling a through-via of claim 9 wherein the solder is an alloy selected from the group consisting of about 95% Pb/5% Sn, about 60% Pb/40% Sn, about 63% In/37% Sn and about 62% Pb/36% Sn/2% Ag.

16. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned such that the through-via is located in line with the cavity;

said cavity optionally may be presented partially filled with conductive material;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via to form a conductive via.

17. The process for filling a through-via of claim 16 wherein the silicon wafer has a thickness of at least about 6 mil.

18. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer having a first surface and a second surface generally opposed to each other, the first surface comprising at least one first interconnect with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate, such that the second surface of the wafer is in contact with the surface of the mounting substrate, the mounting substrate comprising a circuit substrate the mounting substrate surface having at least one second interconnect, wherein the silicon wafer is positioned such that the through-via is located in line with the second interconnect;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via such that the conductive material fills the through-via to form a conductive via in electrical contact with the first interconnect and the second interconnect.

19. The process for filling a through-via of claim 18 wherein the silicon wafer has a thickness of at least about 6 mil.

20. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned such that the through-via is located in line with the cavity;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via such that the conductive material fills the through-via and the cavity in the mounting substrate to form a conductive via.

21. The process for filling a through-via of claim 20 wherein the silicon wafer has a thickness of at least about 6 mil.

22. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer having a first surface and a second surface generally opposed to each other with at least one through-via, wherein the first surface comprises an electrical interconnect;

mounting the silicon wafer onto a surface of a mounting substrate such that the second surface of the silicon wafer is in contact with the surface of the mounting substrate, the mounting substrate surface having at least one cavity, wherein the silicon wafer is positioned such that the through-via is located in line with the cavity;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via such that the conductive material fills both the through-via and the cavity in the mounting substrate and the conductive material wets the interconnect to form a conductive via.

23. The process for filling a through-via of claim 22 wherein the silicon wafer has a thickness of at least about 6 mil.

24. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate the mounting substrate comprising a circuit substrate, the mounting substrate surface having at least one interconnect, wherein the silicon wafer is positioned such that the through-via is located in line with the interconnect;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via such that the conductive material fills the through-via in electrical contact with the interconnect.

25. The process for filling a through-via of claim 24 wherein the silicon wafer has a thickness of at least about 6 mil.

26. A process for filling a through-via with a conductive material, the process comprising the steps of:

providing a silicon wafer having a first surface and a second surface generally opposed to each other, the first surface comprising at least one first interconnect with at least one through-via;

mounting the silicon wafer onto a surface of a mounting substrate, such that the second surface of the wafer is in contact, the mounting substrate comprising a circuit substrate the mounting substrate surface having at least one second interconnect, wherein the silicon wafer is positioned such that the through-via is located in line with the second interconnect;

providing a multiplicity of conductive material balls;

depositing conductive material balls in the through-via by means of a vacuum nozzle or tube, such that sufficient conductive material is deposited in the via to fill the via; and

reflowing the conductive material in the through-via such that the conductive material fills the through-via to form a conductive via in electrical contact with the first interconnect and the second interconnect.

27. The process for filling a through-via of claim 26 wherein the silicon wafer has a thickness of at least about 6 mil.