Fault tolerant dual cache system

• US 6,591,335 B1
• Filed: 09/29/2000
• Issued: 07/08/2003
• Est. Priority Date: 09/29/2000
• Status: Expired due to Term

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: EMC Corporation (Dell Technologies Inc.)
• Inventors: Sade, Gilad, Shagam, Eli, Vishlitzky, Natan
• Primary Examiner(s): Verbrugge, Kevin
• Application Number:
  US09/676,686
• Time in Patent Office: 1,012 Days
• Field of Search: 711/113, 711/119, 711/120, 711/129, 711/161, 711/162, 714/9, 714/6, 714/14
• US Class Current: 711/113
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/20 using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
• CPC Class Codes: G06F 12/0873 Mapping of cache memory to specific storage devices or parts thereof
• CPC Class Codes: G06F 2212/285 Redundant cache memory

Abstract

Managing data in cache includes providing data from a disk storage area to a first cache memory, providing data from the disk storage area to a second cache memory, where the first and second cache memories contain at least some data that is not stored in the other one of the cache memories, and writing the same data to both of the cache memories in response to the data being modified while stored in the cache memories. Managing data in a cache may also include subdividing the first cache memory into primary and secondary storage areas, subdividing the second cache memory into primary and secondary storage areas, where primary areas of the first cache correspond to secondary areas of the second cache and where secondary areas of the first cache correspond to primary areas of the second cache, and providing data from the disk storage area to the one of the cache memories having a corresponding primary storage area. Managing data in a cache memory may also include subdividing the disk storage area into a plurality of slots, where each of the slots corresponds to a primary area of one of the cache memories and to a secondary area of the other one of the cache memories.

Claims

1. A method of managing data in cache, comprising:

providing data from a disk storage area to a first cache memory;

providing data from the disk storage area to a second cache memory, wherein at least some of the data that is provided to the first cache memory is not provided to the second cache memory and at least some of the data that is provided to the second cache memory is not provided to the first cache memory; and

writing the same data to both of the cache memories in response to the data being modified while stored in the cache memories.

2. A method, according to claim 1, further comprising:

subdividing the first cache memory into primary and secondary storage areas;

subdividing the second cache memory into primary and secondary storage areas, wherein primary areas of the first cache correspond to secondary areas of the second cache and wherein secondary areas of the first cache correspond to primary areas of the second cache; and

providing data from the disk storage area to the one of the cache memories having a corresponding primary storage area.

3. A method, according to claim 2, further comprising:

subdividing the disk storage area into a plurality of slots, wherein each of the slots corresponds to a primary area of one of the cache memories and to a secondary area of the other one of the cache memories.

4. A method, according to claim 2, further comprising:

in response to data in a primary area of one of the cache memories being modified, copying related data into the corresponding secondary area of the other one of the cache memories.

5. A method, according to claim 1, further comprising:

providing control data for each of the areas of the cache memories, wherein the control data indicates whether the corresponding area has been modified since being provided to one of the cache memories from the disk storage area.

6. A method, according to claim 5, further comprising:

causing the control data for one of the cache memories to be the same as the control data for the other one of the cache memories.

7. A method, according to claim 6, further comprising:

writing control data to both of the cache memories at the same time.

8. A method, according to claim 1, further comprising:

in response to hardware for the first cache memory failing, using the second cache memory.

9. A method, according to claim 8, wherein using the second cache memory includes using portions of the second cache memory corresponding to data provided to the second cache memory from the disk storage area.

10. A method, according to claim 8, further comprising:

for data stored in the first cache memory but not in the second cache memory, indicating that the data is not stored in cache after the first cache memory fails.

11. A method of managing data in cache, comprising:

providing first and second physical cache areas;

subdividing each of the first and second physical cache areas into first and second logical cache areas, wherein portions of the first logical cache area are provided on both the first and second physical cache areas and portions of the second logical cache area are provided on both the first and second physical cache areas;

assigning portions of data from a disk storage area to one of;

the first logical cache area and the second logical cache area; and

providing data from the disk storage area to one of the physical cache areas according to assignment of the data to a particular one of the logical cache areas.

12. A method, according to claim 11, further comprising:

writing data to both of the physical cache areas in response to the data being modified while stored in the cache.

13. A method, according to claim 11, further comprising:

providing control data for portions of the physical cache areas, wherein the control data indicates whether the corresponding portion has been modified since being provided from the disk storage area.

14. A method, according to claim 13, further comprising:

causing control data from one of the physical cache areas to equal control data from the other one of the physical cache areas.

15. A method, according to claim 14, wherein the control data is written to both of the physical cache areas each time the control data is modified.

16. A method, according to claim 11, further comprising:

in response to hardware for one of the physical cache areas failing, using the other one of the physical cache areas.

17. A memory device, comprising:

a disk storage area;

a first cache memory that is provided data by said disk storage area;

a second cache memory that is provided data by said disk storage area, wherein at least some of the data that is provided to the first cache memory is not provided to the second cache memory and at least some of the data that is provided to the second cache memory is not provided to the first cache memory and wherein data is provided to both of the cache memories in response to the data being modified while stored in one of the cache memories.

18. A memory device, according to claim 17, wherein said first and second cache memories have substantially the same storage capacity.

19. A memory device, according to claim 17, wherein the first cache memory is subdivided into primary and secondary storage areas and the second cache memory is subdivided into primary and secondary storage areas, the primary areas of the first cache memory corresponding to secondary areas of the second cache memory and the secondary areas of the first cache memory corresponding to primary areas of the second cache memory.

20. A memory device, according to claim 19, wherein data from the disk storage area is provided to the one of the cache memories having a corresponding primary storage area.

21. A memory device, according to claim 20, wherein the disk storage area is subdivided into a plurality of slots, each of the slots corresponding to a primary area of one of the cache memories and to a secondary area of the other one of the cache memories.

22. A memory device, according to claim 20, wherein related data is copied into a corresponding secondary area of the other one of the cache memories in response to data in a primary area of one of the cache memories being modified.

23. A memory device, according to claim 19, wherein control data provided to each of the cache memories indicates whether the corresponding area has been modified since being provided to one of the cache memories from the disk storage area.

24. A memory device, according to claim 23, wherein the control data for one of the cache memories is the same as the control data for the other one of the cache memories.

25. A memory device, according to claim 24, wherein control data is written to both of the cache memories at the same time.

26. A memory device, according to claim 19, wherein the second cache memory is used in response to hardware for the first cache memory failing.

27. A memory device, according to claim 26, wherein data is not stored in cache after the first cache memory fails.

28. A memory device, comprising:

a disk storage area;

a first physical cache area subdivided into a first logical cache area and a second logical cache area, wherein data from the disk storage area is assigned to one of the first and the second logical cache areas of the first physical cache area; and

a second physical cache area subdivided into a first logical cache area and a second logical cache area, wherein data from the disk storage area is assigned to one of the first and the second logical cache areas of the second physical cache area and wherein data is provided from said disk storage area to one of said first and second physical cache areas according to assignment of the data to one of the logical cache areas.

29. A memory device, according to claim 28, wherein said first and second physical cache areas have substantially the same storage capacity.

30. A memory device, according to claim 28, wherein said first and second logical cache areas have substantially the same storage capacity.

31. A memory device, according to claim 28, wherein data is provided to both of the physical cache areas in response to the data being modified while stored in the cache.

32. A memory device, according to claim 28, wherein control data is provided to the physical cache areas to indicate whether corresponding portions of data in the physical cache areas has been modified since being provided from the disk storage area.

33. A memory device, according to claim 32, wherein control data from one of the physical cache areas is the same as control data from a corresponding portion of the other one of the physical cache areas.

34. A memory device, according to claim 33, wherein the control data is written to both of the physical cache areas each time the control data is modified.

35. A memory device, according to claim 28, wherein the other one of the physical cache areas is used in response to hardware for one of the physical cache areas failing.