Method of manufacturing semiconductor optical device

• US 6,593,162 B1
• Filed: 06/27/2002
• Issued: 07/15/2003
• Est. Priority Date: 02/21/2002
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Park, Kyung Hyun, Oh, Kwang Ryong, Baek, Yong Soon, Kim, Sung Bock
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US10/185,137
• Time in Patent Office: 383 Days
• Field of Search: 438/23, 438/24, 438/29, 438/31, 438/32, 438/36, 438/40, 438/43, 438/47
• US Class Current: 438/31
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01S 5/1014 Tapered waveguide, e.g. spotsize converter H01S5/1064 takes precedence
• CPC Class Codes: H01S 5/1032 Coupling to elements comprising an optical axis that is not aligned with the optical axis of the active region
• CPC Class Codes: H01S 5/106 varying thickness along the optical axis
• CPC Class Codes: H01S 5/2081 using special etching techniques
• CPC Class Codes: H01S 5/227 Buried mesa structure ; Striped active layer
• CPC Class Codes: H01S 5/2275 mesa created by etching
• CPC Class Codes: H01S 5/34373 based on InGa(Al)AsP

Abstract

The present invention relates to a method of manufacturing a semiconductor optical device. The present invention discloses a method of manufacturing an optical device of a planar buried heterostructure (PBH) type by which an active layer region of a taper shape at both ends is patterned, an undoped InP layer is selectively grown in order to reduce the propagation loss and two waveguides are simultaneously formed by means of a self-aligned method, thus simplifying the process to increase repeatability and yield.

Claims

1. A method of manufacturing a semiconductor optical device, comprising the steps of:

sequentially forming a first waveguide layer, a first clad layer, a second waveguide layer and a second clad layer on a semiconductor substrate;

depositing a first hard mask on the second clad layer and then forming a first hard mask pattern having a taper shape at both ends;

etching the second clad layer and the second waveguide layer using the first hard mask pattern as an etch mask;

selectively growing an undoped InP layer at regions from which the second clad layer and the second waveguide layer are etched using the first hard mask pattern as a selective mask and then flattening the undoped InP layer;

removing the first hard mask pattern;

forming a second hard mask pattern the width of which is smaller than the width of the first hard mask pattern on a result from which the first hard mask is removed; and

etching the undoped InP layer, the second clad layer, the second waveguide layer, the first clad layer and the first waveguide layer using the second hard mask pattern as an etch mask to simultaneously form a second waveguide layer and a first waveguide layer having different widths.

2. The method of manufacturing a semiconductor optical device as claimed in claim 1, further comprising the steps of:

forming an electrical isolation layer at regions where the undoped InP layer, the second clad layer, the second waveguide layer the first clad layer and the first waveguide layer are etched;

removing the second hard mask pattern;

forming an upper clad layer on a result from which the second hard mask pattern is removed;

depositing an electrically conductive layer on the upper clad layer and then patterning the electrically conductive layer in order to inject current into the second waveguide layer;

forming a silicon nitride film on a result in which the electrically conductive layer is pattern and then etching the silicon nitride film in order to electrically connect the electrically conductive layer and an electrode, thus forming an opening portion; and

forming an electrode electrically connected to the electrically conductive layer.

3. The method of manufacturing a semiconductor optical device as claimed in claim 2, wherein said electrical isolation layer is formed by growing an InP layer in a p/n/p type.

4. The method of manufacturing a semiconductor optical device as claimed in claim 1, wherein said first waveguide layer is formed to be a n-InGaAsP layer, said second waveguide layer is formed to be an undoped InGaAsP layer, said first clad layer is formed to be a n-InP layer, and said second clad layer is formed to be a p-InP layer.

5. The method of manufacturing a semiconductor optical device as claimed in claim 1, wherein an InGaAsP layer is further formed at lower and upper sides of the second waveguide layer for separate confinement heterostructure and uniform gain depending on polarization.

6. The method of manufacturing a semiconductor optical device as claimed in claim 1, wherein the widths at the central portion and edge of said second hard mask pattern are different, the width at the edge of the second hard mask pattern is wider than the width at the central portion of the second hard mask pattern, the width of the central portion of the second hard mask pattern is narrower than the width of the fist hard mask pattern and the boundary at the central portion and the edge of the second hard mask pattern is tapered.

7. The method of manufacturing a semiconductor optical device as claimed in claim 1, wherein the etching process using the second hard mask pattern as an etch mask includes performing a dry etching process to a given depth and then performing a wet etching process.

8. The method of manufacturing a semiconductor optical device as claimed in claim 1, wherein said first and second hard masks are formed to be a silicon nitride film.