Power semiconductor device

• US 6,593,781 B2
• Filed: 06/07/2002
• Issued: 07/15/2003
• Est. Priority Date: 12/13/2001
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Yoshimura, Kousuke
• Primary Examiner(s): Le, Dinh T.
• Application Number:
  US10/163,577
• Publication Number:
  US 20030112040A1
• Time in Patent Office: 403 Days
• Field of Search: 327/108, 327/110, 327/333
• US Class Current: 327/110
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H02M 7/538 in a push-pull configuration H02M7/5375 takes precedence ; with oscillating arrangements H02M7/53832, H02M7/53846
• CPC Class Codes: H02P 27/06 using dc to ac converters or inverters H02P27/05 takes precedence
• CPC Class Codes: H03K 17/063 in field-effect transistor switches

Abstract

A power semiconductor device includes an input signal processor circuit to which control signals are input, and power device driving circuits for individually driving power devices based on output signal of the input signal processor circuit. Level shift circuits are individually inserted between the input signal processor circuit and the power device driving circuit on a p-side and between the input signal processor circuit and the power device driving circuit on an n-side to electrically insulate GND lines for the p-side and n-side power device driving circuits and a GND line for the input signal processor circuit.

Claims

1. A power semiconductor device comprising:

an input signal processor circuit to which control signals are input, and

power device driving circuits for driving power devices based on output signal of the input signal processor circuit, and

level shift circuits which are individually inserted between the input signal processor circuit and the power device driving circuit on a p-side and between the input signal processor circuit and the power device driving circuit on an n-side to electrically insulate ground lines for the p-side and n-side power device driving circuits and a ground line for the input signal processor circuit.

2. A power semiconductor device according to claim 1, further comprising a logic filter and RS latch circuits each provided in a rear stage of the level shift circuit to remove an erroneous signal output from the level shift circuit because of variations in power source and ground potentials.

3. A power semiconductor device according to claim 1, further comprising a current-pulse-train converter circuit connected to a rear stage of the input signal processor circuit to convert a voltage-amplified signal output from the input signal processor circuit into a current-pulse train.

4. A power semiconductor device according to claim 3, wherein said current-pulse-train converter circuit has pulse-applying functions to periodically input pulse signals to the level shift circuit while the level shift circuit is maintained in an ON or OFF state.

5. A power semiconductor device according to claim 1, further comprising protection circuits each detecting an abnormality of anyone of a shortcircuit, an overload, and an overvoltage in the p-side or n-side drive power device, wherein detection signals from the circuits are output to external control circuits via second level shift circuits.

6. A power semiconductor device according to claim 5, further comprising current-pulse-train converter circuits each provided in a front stage of the second level shift circuit to convert a voltage-amplified signal output from the protection circuit to a current-pulse train.

7. A power semiconductor device according to claim 5, further comprising a logic filter and RS latch circuits each provided in a rear stage of the second level shift circuit to remove an erroneous signal output from the second level shift circuit because of variations in power source and GND potentials.

8. A power semiconductor device according to claim 6, further comprising a logic filter and RS latch circuits each provided in a rear stage of the second level shift circuit to remove an erroneous signal output from the second level shift circuit because of variations in power source and GND potentials.

9. A power semiconductor device according to claim 1, wherein a plurality of combinations of the p-side and n-side driving circuits are integrated in one power semiconductor device.