Micromachined membrane particle filter using parylene reinforcement

• US 6,598,750 B2
• Filed: 12/20/2000
• Issued: 07/29/2003
• Est. Priority Date: 11/07/1997
• Status: Expired due to Term

• Current Assignee: California Institute of Technology
• Original Assignee: California Institute of Technology
• Inventors: Tai, Yu-Chong, Yang, Xing
• Primary Examiner(s): Walker, W. L.
• Assistant Examiner(s): SORKIN, DAVID L
• Application Number:
  US09/741,968
• Publication Number:
  US 20010019029A1
• Time in Patent Office: 951 Days
• Field of Search: 210/490, 210/500.23, 210/500.26, 210/506, 210/500.24, 216/56, 216/83, 216/95, 216/96, 216/99, 216/2, 427/244
• US Class Current: 210/490
• CPC Class Codes: B01D 2239/0471 Surface coating material
• CPC Class Codes: B01D 2239/0478 on a layer of the filter
• CPC Class Codes: B01D 2239/10 Filtering material manufacturing
• CPC Class Codes: B01D 2325/021 Pore shapes
• CPC Class Codes: B01D 39/2093 Ceramic foam
• CPC Class Codes: B01D 67/0034 by micromachining techniques, e.g. using masking and etching steps, photolithography
• CPC Class Codes: B01D 67/0062 by micromachining techniques, e.g. using masking and etching steps, photolithography
• CPC Class Codes: B01D 67/0072 by deposition from the gaseous phase, e.g. sputtering, CVD, PVD
• CPC Class Codes: B01D 67/0088 Physical treatment with compounds, e.g. swelling, coating or impregnation
• CPC Class Codes: B01D 71/02 Inorganic material
• CPC Class Codes: B01D 71/0213 Silicon
• CPC Class Codes: B01D 71/72 Macromolecular compounds obtained otherwise than by reactions only involving carbon-to-carbon unsaturated bonds, not provided for in a single one of the groups B01D71/46 - B01D71/70 and B01D71/701 - B01D71/702

Abstract

A micromachined membrane particle filter is formed by making holes in a silicon and coating over the holes with Parylene.

Claims

1. A micromachined membrane filter, comprising:

a semiconductor base layer;

a filter border comprising a filter material layer comprising a filter material disposed on at least a portion of the base layer;

a grid comprising the filter material, the grid connected to the filter material layer and spanning a filter area defined by the filter border, the grid defining a plurality of openings with an opening factor of between about 37.3% and about 44.4%.

2. The filter of claim 1, wherein the semiconductor base layer comprises silicon.

3. The filter of claim 1, wherein the filter material comprises silicon nitride.

4. The filter of claim 1, further comprising a coating layer on the grid, a thickness of the coating layer chosen so that the opening size is decreased to be equal to a desired filter pore size.

5. The filter of claim 4, wherein the desired filter pore size corresponds to an opening factor of between about 11.6% and about 18.5%.

6. The filter of claim 4, wherein the coating layer comprises Parylene.

7. The filter of claim 6, wherein the thickness is at least 2 μ

m.

8. A method of forming a micromachined particle filter, comprising:

forming a plurality of openings in a grid area of a filter layer so that an opening factor of the grid area is between about 37.3% and about 44.4%; and

coating edges of the openings with a thickness of an overlayer material to achieve a desired filter pore size.

9. A method as in claim 8 wherein said openings have a shape chosen from the group consisting of circular, rectangular, and hexagonal when formed.

10. A method as in claim 8 wherein said desired pore size corresponds to an opening factor ranging from about 11.6% to about 18.5%.

11. A method as in claim 8, wherein said coating comprises coating with at least 2 μ

m thick of Parylene.

12. A method, comprising:

forming a first layer on a first side of a semiconductor substrate;

etching a second side opposite the first side of the semiconductor substrate, forming a thinned area of the semiconductor substrate;

forming openings in the first layer across a grid area so that an opening factor of the first layer across the grid area is between about 37.3% and about 44.4%; and

substantially removing the thinned area of the semiconductor substrate beneath the grid area of the first layer.

13. A method as in claim 12, further including coating the openings with a coating material.

14. A method as in claim 12, wherein said coating material comprises Parylene.

15. A method as in claim 12, wherein said first layer includes silicon nitride.

16. A method as in claim 12, wherein said first layer is between one-half micron and one micron in thickness.

17. A method as in claim 16, wherein said semiconductor substrate includes silicon.

18. A method as in claim 12, wherein said removing comprises using an anisotropic etch.

19. A method as in claim 12, wherein said forming said openings comprises forming patterns defining openings which are between six and thirteen microns.

20. A method, comprising:

depositing a first layer of silicon nitride of between one-half and one micron thick on a first side of a substrate including silicon;

etching a second side opposite the first side of said substrate to form a thinned layer of substrate that is between 20 and 100 microns in width, supporting said silicon nitride first layer;

forming openings in said silicon nitride first layer over a grid area so that an opening factor of the first layer across the grid area is between about 37.3% and about 44.4%, and wherein said openings are larger than a desired final filter pore size; and

removing said thinned layer of substrate at least beneath the grid area.

21. The method of claim 20, further comprising coating said openings with a biocompatible material to form filter pores of the desired final filter pore size.