Method and forming fine patterns of semiconductor devices using passivation layers

• US 6,599,844 B2
• Filed: 06/22/2001
• Issued: 07/29/2003
• Est. Priority Date: 06/22/2000
• Status: Expired due to Fees

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Koh, Cha-Won, Bok, Cheol-Kyu
• Primary Examiner(s): COLEMAN, WILLIAM D
• Application Number:
  US09/886,463
• Publication Number:
  US 20020006585A1
• Time in Patent Office: 767 Days
• Field of Search: 430/314, 438/725
• US Class Current: 438/725
• CPC Class Codes: G03F 7/40 Treatment after imagewise removal, e.g. baking
• CPC Class Codes: G03F 7/405 Treatment with inorganic or organometallic reagents after imagewise removal

Abstract

A method is disclosed for forming fine photoresist patterns on semiconductor devices using a modified, two-step dry develop process using a fluorine-containing gas to produce hydrophobic SiO_x passivation layers on the sidewalls of the photoresist patterns. These passivation layers increase the structural stability of the fine photoresist patterns and prevent moisture within an air from cohering on the photoresist patterns when the semiconductor substrate is subsequently exposed to the air. Accordingly, the present invention improves the processing margins for very high aspect ratio photoresist patterns resulting in reduced rework and increased yield on very highly integrated semiconductor devices.

Claims

1. A method for forming fine photoresist patterns on a first film, the method comprising the sequential steps of:

a) forming a photoresist pattern on the first film using a first dry development process, the photoresist pattern comprising upper surfaces and sidewalls; and

b) forming a passivation layer on the sidewalls of the first photoresist pattern using a second dry development process incorporating a fluorine-containing gas, the passivation layer comprising hydrophobic SiO_x, wherein the fluorine-containing gas comprises a C₂F₆/O₂ gas mixture and a CF₄/O₂ gas mixture.

2. A method for forming fine photoresist patterns according to claim 1, wherein step a) further comprises the steps of:

a1) forming a photoresist film suitable for a top surface imaging process;

a2) treating the photoresist film with a first bake, the first bake being sufficient to reduce a solvent from the photoresist film;

a3) selectively exposing portions of the photoresist film using a photomask to direct the exposure;

a4) treating the photoresist film with a second bake;

a5) forming a silylated photoresist pattern by contacting the exposed portions of the photoresist film and a silylation agent; and

a6) etching the photoresist film using the silylated photoresist pattern as an etching mask.

3. A method for forming fine photoresist patterns as recited in claim 2, wherein the first bake process has a duration of between 10 and 300 seconds at a temperature of 80 to 250°

C.

4. A method for forming fine photoresist patterns as recited in claim 2, wherein the photoresist film has a thickness of approximately 2,000 to 12,000 Å

.

5. A method for forming fine photoresist patterns as recited in claim 2, wherein the step of selectively exposing portions of the photoresist film comprise illuminating the photoresist film with exposure light from a source selected from the group consisting of I-line, ArF, 157 nm-wavelength, X-ray and E-beam sources.

6. A method for forming fine photoresist patterns as recited in claim 2, wherein the silylation agent is selected from the group consisting of TMDS (1,1,3,3-tetramethyl disilazane), TMSDMA (n,n-dimethylamine-trimeth-ylsilane), TMSDEA (n,n-diethylaminotrimethyl-amine), B[DMA]DS(bis(dimethylamino)dimethylsilane) and B[DMA]MS((bis(dimethylamino)methy-lsilane).

7. A method for forming fine photoresist patterns as recited in claim 2, wherein the second bake has a duration of between 60 and 350 seconds is performed at a temperature of between 70 and 200°

C.

8. A method for forming fine photoresist patterns as recited in claim 1, wherein the first dry development process comprises a plasma etch using O₂ gas or a mixed gas of SO₂/O₂.

9. A method for forming fine photoresist patterns as recited in claim 8, wherein the first dry development process is performed a temperature between approximately −

50 and 10°

C. and at a pressure between approximately 1 and 50 mTorr.

10. A method for forming fine photoresist patterns as recited in claim 9, wherein the first dry development process is carried out in equipment having power applied to an upper electrode and a lower electrode and a bias power, and further wherein the power applied to the upper electrode is between 50 and 2,000 W, the power applied to the lower electrode is between 10 and 500 W, the bias power being between 10 and 150 W.

11. A method for forming fine photoresist patterns as recited in claim 1, wherein the first dry development process is carried out at a temperature between approximately −

50 and 10°

C. and at a pressure between approximately 1 and 50 mTorr.

12. A method for forming fine photoresist patterns as recited in claim 11, wherein the first dry development process is carried out in equipment having power applied to an upper electrode and a lower electrode and a bias power, and further wherein the power applied to the upper electrode is between 50 and 2,000 W, the power applied to the lower electrode is between 10 and 500 W, the bias power being between 10 and 150 W.

13. A method for forming fine photoresist patterns as recited in claim 2, further comprising the step of treating a surface of the first film with HMDS (hexamethyldisiazane) vapor before forming the photoresist film, the treatment increasing an adhesive strength between the first film and the photoresist film.

14. A method for forming fine patterns on a semiconductor device, the method comprising the steps of:

a) forming a device layer on the semiconductor substrate;

b) forming a photoresist layer on the device layer;

c) selectively exposing surface portions of the photoresist layer to light energy, thereby forming exposed regions and unexposed regions on the surface of the photoresist layer;

d) treating the exposed surface portions of the photoresist layer to form a silylated photoresist pattern in an upper portion of the photoresist layer;

e) performing a first dry develop using the silylated photoresist pattern as a mask, thereby removing a portion of the photoresist layer beneath the unexposed regions of the photoresist layer and forming a first photoresist pattern having a silylated upper surface and substantially vertical sidewalls;

f) performing a second dry develop using a fluorine-containing gas to form hydrophobic SiO_x passivation layers on the sidewalls of the first photoresist pattern sufficient to prevent moisture from cohering to the sidewalls wherein the fluorine-containing gas comprises a C₂F₆/O₂ gas mixture and a CF₄/O₂ gas mixture.

15. A method for forming fine patterns on a semiconductor device according to claim 14, wherein

the photoresist layer comprises a solvent and further wherein the step of forming the photoresist layer on the device layer further comprises a step of baking the photoresist layer to remove a portion of the solvent;

the step of selectively exposing surface portions of the photoresist layer to light energy further comprises positioning a photomask between the photoresist layer and a light source; and

the step of treating the exposed surface portions of the photoresist layer to form a silylated photoresist pattern further comprises a second step of baking the photoresist layer and applying a silylation agent to the exposed surface portions of the photoresist layer.

16. A method for forming fine patterns on a semiconductor device according to claim 15, wherein the photresist layer has a thickness between about 2,000 Å

and 12,000 Å

.

17. A method for forming fine patterns on a semiconductor device according to claim 14, further comprising a step of treating the device layer with HMDS before forming the photoresist layer to improve adhesion between the device layer and the photoresist layer.