Semiconductor integrated circuit and designing method thereof
First Claim
Patent Images
1. A semiconductor integrated circuit having an inductance, comprising:
- a semiconductor internal circuit having a first power supply line and a second power supply line;
first and second terminals for a first power supply fed to said semiconductor internal circuit and third and fourth terminals for a second power supply;
a first inductor connected between said first power supply line of said internal circuit and said first terminal and having a predetermined inductance;
a second inductor connected between said first power supply line of said internal circuit and said second terminal and having an inductance substantially equal to said predetermined inductance of said first inductor;
a third inductor connected between said second power supply line of said internal circuit and said third terminal and having an inductance smaller than said predetermined inductance; and
a fourth inductor connected between said second power supply line of said internal circuit and said fourth terminal and having an inductance smaller than said predetermined inductance.
2 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor integrated circuit has a semiconductor internal circuit having a first power supply line and a second power supply line, wiring layers connected to a plurality of terminals of a first power supply and each having a predetermined inductance, and wiring layers connected to a plurality of terminals of a second power supply and each having a smaller inductance. Each of the former wiring layers has an inductor making a loop around the internal circuit.
15 Citations
9 Claims
-
1. A semiconductor integrated circuit having an inductance, comprising:
-
a semiconductor internal circuit having a first power supply line and a second power supply line;
first and second terminals for a first power supply fed to said semiconductor internal circuit and third and fourth terminals for a second power supply;
a first inductor connected between said first power supply line of said internal circuit and said first terminal and having a predetermined inductance;
a second inductor connected between said first power supply line of said internal circuit and said second terminal and having an inductance substantially equal to said predetermined inductance of said first inductor;
a third inductor connected between said second power supply line of said internal circuit and said third terminal and having an inductance smaller than said predetermined inductance; and
a fourth inductor connected between said second power supply line of said internal circuit and said fourth terminal and having an inductance smaller than said predetermined inductance. - View Dependent Claims (2, 3, 4, 5, 6)
where Imac(t=0) means Imac(ω
,t=0) and G=Rchip/{square root over ( )}{(Lboard+Lchip)/Cchip} stands.
-
-
7. A semiconductor integrated circuit comprising:
-
a plurality of first power supply pads;
a plurality of second power supply pads;
a first power supply line for supplying a first power supply voltage applied to said plurality of first power supply pads to an internal circuit;
a second power supply line for supplying a second power supply voltage applied to said plurality of second power supply pads to said internal circuit; and
a plurality of inductors each connected between each of said plurality of first power supply pads and said first power supply line and each arranged to make a loop around said internal circuit so that said plurality of inductors have mutually substantially equal impedances reaching nodes at which said internal circuit connects to said first power supply line;
wherein wiring conductors constituting said plurality of inductors are each formed to make a loop around a semiconductor chip and are connected between corresponding power supply pads and said first power supply line such that currents flow through said individual wiring conductors in the same direction; and
wherein the wiring conductor constituting each of said inductors is formed to make a loop by ¾
or more turns around an area in which said internal circuit of the semiconductor chip is formed.
-
-
8. A semiconductor integrated circuit comprising:
-
a plurality of first power supply pads;
a plurality of second power supply pads;
a first power supply line for supplying a first power supply voltage applied to said plurality of first power supply pads to an internal circuit;
a second power supply line for supplying a second power supply voltage applied to said plurality of second power supply pads to said internal circuit; and
a plurality of inductors each connected between each of said plurality of first power supply pads and said first power supply line and each arranged to make a loop around said internal circuit so that said plurality of inductors may have mutually substantially equal impedances reaching nodes at which said internal circuit connects to said first power supply line;
wherein a wiring layer constituting said first power supply line serves as one electrode of a capacitor and a conductive layer serving as the other electrode of the capacitor is formed to oppose the one electrode through an insulating film;
wherein said insulating film between the one electrode and the other electrode is provided with a conductive layer formed separately from the conductive layers constituting these electrodes to decrease the distance between the one electrode and the other electrode; and
wherein said insulating film between the one electrode and the other electrode is provided with a conductive layer formed separately from the conductive layers constituting these electrodes and having irregularities to decrease the distance between the one electrode and the other electrode and increase a substantial opposing area. - View Dependent Claims (9)
G=Rchip/{(Lboard+Lchip)/Cchip} stands.
-
Specification