Test program generation system and test program generation method for semiconductor test apparatus

• US 6,601,203 B1
• Filed: 09/23/1999
• Issued: 07/29/2003
• Est. Priority Date: 11/26/1998
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Asano, Yoshihiro, Kodashiro, Yoshiaki, Okabe, Kinji, Komuro, Koji
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): LAMARRE, GUY J
• Application Number:
  US09/401,287
• Time in Patent Office: 1,405 Days
• Field of Search: 716/18, 714/724, 714/718, 714/738, 714/734, 714/26, 714/36, 714/43, 714/46, 714/740, 714/741, 714/739, 702/121-124, 702/91, 706/916, 324/73.1, 713/2
• US Class Current: 714/738
• CPC Class Codes: G01R 31/318307 computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging

Abstract

In test program generation system and test program generation method for semiconductor test apparatus, there is used data necessary for generation of test programs of respective kinds of LSI testers of data of library in which information common to respective kinds of LSI testers are registered, and data of device information file in which inherent device information are registered every kinds of LSIs to convert those data into data of common language independent of inherent various test program languages every kinds of LSI testers to thereby generate test element data used for generation of test programs of respective kinds of LSI testers. Accordingly, preparation of test programs corresponding to respective kinds of LSI testers can be made. Thus, it becomes possible to easily carry out preparation and modification of template files in which measurement sequences prepared every kinds of LSI testers are described.

Claims

1. A test program generation system for semiconductor test apparatus comprising:

a memory adapted so that there are stored a library in which information common to a plurality of different kinds of LSI testers are registered, and a device information file in which inherent device information are registered for each of a plurality of different kinds of LSIs; and

a library extraction/test element data generator for reading out data necessary for generating test programs of the respective different kinds of the LSI testers from the library and the device information file of the memory to convert the read out data into test element data commonly used for each of the plurality of different kinds of the LSI testers, said test element data including information relating to test programs.

2. A test program generation system for semiconductor test apparatus as set forth in claim 1, further comprising:

test element data library registration means for registering the test element data into the library of the memory.

3. A test program generation system for semiconductor test apparatus as set forth in claim 2, further comprising:

a plurality of test program generators provided correspondingly for each of the plurality of different kinds of the LSI testers for the purpose of converting the test element data to thereby prepare a test program correspondingly for each of the plurality of different kinds of the LSI testers by an ASCII format file; and

a plurality of program translators provided correspondingly for each of the plurality of different kinds of the LSI testers for the purpose of carrying out a compile operation and a link operation of the test programs of the ASCII format file to thereby generate test programs of binary files which are executable programs correspondingly for each of the plurality of different kinds of the LSI testers.

4. A test program generation system for semiconductor test apparatus as set forth in claim 1,

wherein conversion of data for generating the test element data is carried out in a state classified into a plurality of information files in which there are included the test element data necessary commonly to generation of the test programs of the respective plurality of different kinds of the LSI testers and a plurality of template files provided correspondingly for each of the plurality of different kinds of the LSI testers, wherein measurement sequences are described for each of the plurality of different kinds of the LSI testers, the test element data being inserted into the measurement sequences.

5. A test program generation system for semiconductor test apparatus as set forth in claim 4,

wherein the plurality of template files are files in which an input function and an output function are capable of being defined or changed after generation of the test element data and the plurality of template files.

6. A test program generation system for semiconductor test apparatus as set forth in claim 4,

wherein the plurality of template files are files in which a range to be repeatedly executed of the measurement sequences is capable of being designated after generation of the test element data and the plurality of template files.

7. A test program generation method for semiconductor test apparatus, comprising:

converting data necessary for generation of test programs of a plurality of different kinds of LSI testers of data of a library in which information common to the respective plurality of different kinds of the LSI testers are registered and data of a device information file in which inherent device information are registered for each of a plurality of different kinds of LSIs into test element data commonly used for each of the respective different kinds of the LSI testers, said test element data including information relating to test programs; and

converting the test element data to thereby prepare test programs correspondingly for each of the plurality of different kinds of the LSI testers by an ASCII format file.

8. A test program generation method for semiconductor test apparatus as set forth in claim 7,

further comprising:

carrying out a compile operation and a link operation of the test programs of the ASCII format file to thereby generate test programs of binary files which are executable programs correspondingly for each of the plurality of different kinds of the LSI testers.

9. A test program generation method for semiconductor test apparatus as set forth in claim 7,

wherein conversion of data for generating the test element data at the first converting step is carried out in a state classified into a plurality of information files in which there are included the test element data necessary commonly to generation of the test programs of the respective plurality of different kinds of the LSI testers, and a plurality of template files provided correspondingly for each of the plurality of different kinds of the LSI testers, wherein measurement sequences are described for each of the plurality of different kinds of the LSI testers, the test element data being inserted into the measurement sequences.

10. A test program generation method for semiconductor test apparatus as set forth in claim 9,

wherein the plurality of template files are files in which an input function and an output function are capable of being defined or changed after generation of the test element data and the plurality of template files.

11. A test program generation method for semiconductor test apparatus as set forth in claim 9,

wherein the plurality of template files are files in which a range to be repeatedly executed of the measurement sequences is capable of being designated after generation of the test element data and the plurality of template files.

12. A test program generation method for semiconductor test apparatus as set forth in claim 7,

wherein, after generation of the test element data at the first conversion step, the test element data is registered into the library.