Synchronization method for a receiving unit and a receiving unit corresponding thereto

• US 6,603,830 B1
• Filed: 02/15/2000
• Issued: 08/05/2003
• Est. Priority Date: 02/15/1999
• Status: Expired due to Term

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Seja, Marco, Finsterbusch, Rolf, Hellmich, Steffen
• Primary Examiner(s): Vo, Don N.
• Assistant Examiner(s): GHULAMALI, QUTBUDDIN
• Application Number:
  US09/504,290
• Time in Patent Office: 1,267 Days
• Field of Search: 375/354-376, 327/156, 327/159
• US Class Current: 375/362
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop
• CPC Class Codes: H04J 3/0638 Clock or time synchronisation among nodes; Internode synchronisation synchronization for ring networks H04L12/422; data switching networks with synchronous transmission H04L12/43
• CPC Class Codes: H04L 7/0332 with an integrator-detector
• CPC Class Codes: H04L 7/08 the synchronisation signals recurring cyclically

Abstract

A receiving unit is more precisely synchronized to a transmitting unit by transmitting synchronization signals from the transmitting unit, adjusting a clock-pulse generator of a phase-locked loop, a phase shifter integrating instantaneous phase errors to an integration value, and adjusting the integration value to an integration fraction that is less than one.

Claims

1. A synchronization method for a receiving unit, comprising the steps of:

cyclically transmitting synchronization signals to the receiving unit from a transmitting unit;

feeding the synchronization signals from the receiving unit to a phase shifter of a phase-locked loop having a clock-pulse generator;

emitting a number of clock signals between two synchronization signals, the clock pulse generator emitting the number of clock signals; and

upon reception of the synchronization signals by the phase shifter, detecting instantaneous phase errors and readjusting the clock-pulse generator so that the clock-pulse generator emits a predetermined number of clock signals between two synchronization signals, the phase shifter integrating the instantaneous phase errors to an integration value, the integration value being adjusted to an integration fraction less than one.

2. The synchronization method according to claim 1, further comprising the step of:

adjusting the instantaneous phase errors to a proportional fraction using the phase shifter, the proportional fraction being less than one.

3. The synchronization method according to claim 2, wherein the proportional fraction is less than the integration fraction.

4. The synchronization method according to claim 1, further comprising the step of:

adjusting the clock-pulse generator only if an absolute value of the instantaneous phase error is less than a maximal error.

5. The synchronization method according to claim 4, further comprising the step of:

increasing a counter if the absolute value of the instantaneous phase error is greater than the maximal error.

6. The synchronization method according to claim 1, further comprising the steps of:

transmitting a validity signal from a control unit to the phase-locked loop; and

executing the synchronization method only if the validity signal is present.

7. The synchronization method according to claim 1, further comprising the step of:

generating primary clock signals using a clock generator arranged in the clock-pulse generator, the primary clock signals being fed to a frequency divider, the frequency diver outputting divided primary clock signals as clock signals.

8. The synchronization method according to claim 1, further comprising the steps of:

before the detection of a first instantaneous phase error, outputting from the clock-pulse generator the desired number of clock signals;

stopping the clock-pulse generator after the step of outputting; and

restarting the clock-pulse generator upon reception of a next synchronization signal.

9. The synchronization method according to claim 8, further comprising the steps of:

upon restarting the clock-pulse generator, starting the clock-pulse generator only after a phase shift; and

detecting the number of clock signals including the phase shift that are outputted by the clock-pulse generator down to the next synchronization signal.

10. The synchronization method according to claim 8, further comprising the steps of:

upon reception of a first synchronization signal after the step of restarting the clock-pulse generator, at least substantially correcting the instantaneous phase error; and

executing the integration of the instantaneous phase errors and the adjustment of the integration value only after receiving a second synchronization signal.

11. The synchronization method according to claim 10, further comprising the step of:

executing the step of correcting the instantaneous phase error only after receiving the second synchronization signal.

12. A receiving unit performing a synchronization method, comprising:

a receiver receiving cyclically transmitted synchronization signals from a transmitting unit; and

a phase-locked loop having a clock-pulse generator, a phase shifter of the phase-locked loop, the synchronization signals being fed to the phase shifter, the clock-pulse generator emitting a number of clock signals between two synchronization signals, the phase shifter detecting instantaneous errors and readjusting the clock-pulse generator so that the clock pulse generator emits a predetermined number of clock signals between two synchronization signals, the phase shifter integrating the instantaneous phase errors to an integration value, the integration value being adjusted to an integration fraction less than one.