Battery charger control circuit and an uninterruptible power supply utilizing same

• US 6,605,879 B2
• Filed: 04/19/2001
• Issued: 08/12/2003
• Est. Priority Date: 04/19/2001
• Status: Expired due to Fees

• Current Assignee: Powerware Corporation (Eaton Corporation PLC.)
• Original Assignee: Powerware Corporation (Eaton Corporation PLC.)
• Inventors: Koosmann, Glenn A., Zahrte, Donald K. Sr., Wade, Joseph R.
• Primary Examiner(s): Sircus, Brian
• Assistant Examiner(s): Polk, Sharon A.
• Application Number:
  US09/838,369
• Publication Number:
  US 20020153779A1
• Time in Patent Office: 845 Days
• Field of Search: 307/64, 307/66, 363/34, 363/37, 320/134
• US Class Current: 307/66
• CPC Class Codes: H02J 9/062 for AC powered loads

Abstract

A charging control circuit for severe battery conditions and an uninterruptible power supply (UPS) system including same are presented. The charging control circuit utilizes both hardware and microprocessor control to allow the UPS to start with depleted or no batteries installed. Initially, the hardware control loops regulate DC bus voltage generation to charge the batteries to a safe level to allow the UPS housekeeping circuitry to wake up and assume control of the UPS operation. Once the microprocessor has awoken, it assumes control of the DC bus and charging of the batteries. If no batteries are installed, the hardware control loop utilizes a fast responding voltage mode control to regulate the DC bus, while a microprocessor-based current mode control is used when batteries are installed. Hardware over voltage control and microprocessor shut off control is also provided.

Claims

1. An uninterruptible power supply (UPS) system, comprising a power module having an input adapted to receive AC mains power, and an output adapted to supply AC power to utilization equipment, the power module having an input controlled rectifier adapted to generate a DC voltage on an internal DC bus and a power inverter coupled to said internal DC bus for generating said AC power on said output, said power module including a hardware control circuit having a first control loop adapted to control said input controlled rectifier to regulate said DC voltage on said internal DC bus at a first safe level below a normal controlled level.

2. The UPS system of claim 1, wherein said power module further comprises a microprocessor control circuit operatively coupled to said hardware control circuit to control said DC voltage on said internal DC bus at said normal controlled level.

3. The UPS system of claim 2, wherein said microprocessor control circuit provides a variable duty cycle control signal to said hardware control circuit, said microprocessor adjusting a duty cycle of said variable duty cycle control signal to vary said DC voltage on said internal DC bus.

4. The UPS system of claim 3, wherein said hardware control circuit controls said DC voltage at said first safe level when said duty cycle of said variable duty cycle control signal is less than approximately 10%, wherein said hardware control circuit controls said DC voltage at a second level above said normal controlled level when said duty cycle of said variable duty cycle control signal is approximately 10%, wherein said hardware control circuit controls said DC voltage at a level between said first safe level and said second level when said duty cycle of said variable duty cycle control signal is between approximately 10% and 75%.

5. The UPS system of claim 2, further comprising a slot adapted to receive a battery, and wherein said microprocessor commands said hardware control circuit to control said DC voltage at a second level above said normal controlled level when no battery is present in said slot.

6. The UPS system of claim 2, further comprising a battery selectively coupled to said input of said controlled rectifier and to said internal DC bus, and wherein said microprocessor commands said hardware control circuit to control said DC voltage at said normal controlled level to charge said battery.

7. The UPS system of claim 6, wherein said microprocessor control circuit commands said hardware control circuit to control said DC voltage to a second level above said normal controlled level upon removal of said battery.

8. The UPS system of claim 2, wherein said hardware control circuit includes a second control loop operative to control said DC voltage below a maximum level.

9. The UPS system of claim 2, further comprising a battery selectively coupled to said input of said controlled rectifier and to said internal DC bus, and wherein said hardware control circuit is operative to control said DC voltage at said first safe level to charge said battery until said microprocessor wakes up, and wherein said microprocessor controls said hardware control circuit to control said DC voltage at said normal controlled level to charge said battery.

10. The UPS system of claim 9, wherein said microprocessor commands said hardware control circuit to control said DC voltage at a second level upon removal of said battery.

11. The UPS system of claim 1, further comprising a kick-start circuit operative upon initial application of AC mains power to start said input controlled rectifier.

12. A battery charger control circuit for use in an uninterruptible power supply (UPS) having an input controlled rectifier adapted to supply DC power to an internal DC bus for use by a power inverter to generate output AC power, the input controlled rectifier selectively utilizing AC mains power and battery power to supply the DC power to the internal DC bus, the battery being coupled to the DC bus to receive charging power therefrom when not selectively coupled to the input controlled rectifier to supply power thereto, comprising:

a hardware control circuit operatively coupled to the input controlled rectifier to control a DC voltage supplied thereby; and

a microprocessor control circuit receiving power from the internal DC bus, said microprocessor control circuit operatively coupled to said hardware control circuit to command said hardware control circuit to control said DC voltage from the input controlled rectifier at a controlled level; and

wherein said hardware control circuit includes a first control loop having a first target voltage below said controlled level to which said hardware control circuit controls said DC voltage when said microprocessor control circuit is not operating.

13. The circuit of claim 12, wherein said hardware control circuit further includes a second target voltage above said controlled level to which said hardware control circuit controls said DC voltage when the battery is removed from the UPS.

14. The circuit of claim 12, wherein said microprocessor control circuit begins commanding said hardware control circuit to control said DC voltage at said controlled level to charge the battery when a voltage on said internal DC bus is sufficient for said microprocessor control circuit to wake up.

15. The circuit of claim 12, further comprising a kick-start circuit operative upon initial application of AC mains power to the UPS to start the input controlled rectifier and enable said hardware control circuit.

16. The circuit of claim 12, wherein said hardware control circuit includes a second control loop having a maximum voltage level to which said hardware control circuit limits the DC voltage in case of failure.

17. The circuit of claim 12, wherein said microprocessor control circuit provides a variable duty cycle control signal to said hardware control circuit to command control of said DC voltage, and wherein said hardware control circuit controls said DC voltage at said first target voltage when said duty cycle of said variable duty cycle control signal is less than approximately 10%, wherein said hardware control circuit controls said DC voltage at a second target voltage above said controlled level when said duty cycle of said variable duty cycle control signal is approximately 10%, and wherein said hardware control circuit controls said DC voltage at a level between said first safe level and said second level when said duty cycle of said variable duty cycle control signal is between approximately 10% and 75%.

18. The circuit of claim 17, wherein said duty cycle is less than 10% when said microprocessor control circuit is not awake.

19. The circuit of claim 17, wherein said duty cycle is set to approximately 10% when said microprocessor is awake and the battery is removed from the UPS.

20. A method of starting an uninterruptible power supply (UPS) having severely discharged batteries upon connection of AC mains power, the UPS including an input controlled rectifier capable of generating a controlled DC voltage on an internal DC bus, the UPS further including a hardware control circuit and a microprocessor control circuit for controlling the input controlled rectifier, comprising the steps of:

controlling the input controlled rectifier by the hardware control circuit to generate a DC voltage on the internal DC bus at a level below a normally controlled voltage to begin charging the batteries;

controlling the input controlled rectifier by the microprocessor control circuit to generate the DC voltage on the internal DC bus at the normally controlled voltage when the internal DC bus reaches a level sufficient for the microprocessor control circuit to wake up.

21. The method of claim 20, wherein said step of controlling the input controlled rectifier to generate the DC voltage on the internal DC bus at the normally controlled voltage comprises the step of providing by the microprocessor control circuit a variable duty cycle control signal to the hardware control circuit, and adjusting a voltage level of the input controlled rectifier by the hardware control circuit in response to a variation in a duty cycle of the variable duty cycle control signal.

22. The method of claim 20, further comprising the step of controlling the input controlled rectifier by the hardware control circuit to generate the DC voltage on the internal DC bus at a second level above the normally controlled voltage when the battery is removed from the UPS.

23. The method of claim 20, further comprising the step of controlling the input controlled rectifier by a second control loop of the hardware control circuit to not exceed a maximum voltage level.