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Apparatus for biasing ultra-low voltage logic circuits

  • US 6,605,981 B2
  • Filed: 04/26/2001
  • Issued: 08/12/2003
  • Est. Priority Date: 04/26/2001
  • Status: Active Grant
First Claim
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1. An integrated circuit device comprising:

  • a plurality of transistors; and

    a global body bias circuit having an output connected to the bodies of said plurality of transistors, wherein said global body bias circuit includes a first and second transistors connected in series between a first power supply and a second power supply, wherein a gate and a source of said first transistor are connected to said first power supply, wherein a gate and a source of said second transistor are connected to said second power supply, wherein drains and bodies of said first and second transistors are connected together to form said output.

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