Compact high addressability rendering

• US 6,608,701 B1
• Filed: 07/07/1999
• Issued: 08/19/2003
• Est. Priority Date: 07/07/1999
• Status: Expired due to Term

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Inventors: Zhang, Yeqing, Loce, Robert P., Curry, Douglas N., Branciforte, Michael, Ebner, Fritz F., Williams, Leon C.
• Primary Examiner(s): Lee, Thomas D.
• Assistant Examiner(s): BRINICH, STEPHEN M
• Application Number:
  US09/348,378
• Time in Patent Office: 1,504 Days
• Field of Search: 358/3-9-, 358/1.9, 358/465-466, 382/237
• US Class Current: 358/3.09
• CPC Class Codes: H04N 1/4052 by error diffusion, i.e. transferring the binarising error to neighbouring dot decisions
• CPC Class Codes: H04N 1/4056 the pattern varying in one dimension only, e.g. dash length, pulse width modulation [PWM]

Abstract

A compact rendering processor for processing image data including a multi-bit halftone region generates high addressability pixels. The compact rendering processor includes a tagging sub-processor operating on the image data to identify a target pixel and a neighboring pixel to determine a fill-order. The compact rendering processor also includes a rendering sub-processor that converts the target pixel into a high addressability pixel based upon the fill-order. Optionally, a diffusion sub-processor can be included to diffuse an error resulting from the conversion of the target pixel into a high addressability pixel to other pixels within the image data.

Claims

1. A method of processing multi-bit image data, comprising:

identifying an observation window within said multi-bit image data, said observation window including a target pixel and a neighboring pixel;

determining a fill-order for said target pixel based on a difference between said target pixel and a first neighboring pixel; and

rendering said target pixel as a function of said fill-order.

2. The method of claim 1, wherein said step of determining a fill-order for said target pixel further comprises determining a difference between said target pixel and a second neighboring pixel.

3. The method of claim 1, wherein said multi-bit image data includes a multi-level halftone region and said target pixel is a pixel within said multi-level halftone region.

4. The method of claim 1, wherein said step of rendering said target pixel Includes determining a number of high addressability pixel events to fill for said target pixel.

5. The method of claim 1, wherein said step of determining a fill-order identifies a rendering pattern that fills high addressability pixel events from a darker pixel towards a lighter pixel.

6. The method of claim 1, wherein said step of rendering said target pixel generates a high addressability pixel and further including the step of diffusing an error resulting from said rendering step.

7. The method of claim 6, wherein said step of diffusing an error comprises:

determining a quantization error; and

distributing the quantization error to a preselected number of multi-bit image pixels.

8. The method of claim 7, wherein said step of determining a quantization error comprises:

comparing the gray level of the target pixel with the gray level of the high addressability pixel; and

generating a rendering error signal that is measure of a difference between an output density of the target pixel and an output density of the high addressability pixel.

9. The method of claim 7, wherein said step of distributing the quantization error distributes a weighted portion of the quantization error to a preselected number of multi-bit image pixels.

10. A compact rendering processor for processing multi-level halftone image data, comprising:

a tagging subprocessor coupled lo receive said multi-level halftone image data, said tagging processor identifying a fill-order by examining the difference between the values of a target pixel and a neighboring pixel and generating a rendering tag; and

a rendering sub-processor coupled to receive said target pixel and said rendering tag, said rendering processor being responsive to said rendering tag to generate a high addressability pixel for said target pixel.

11. The compact rendering processor of claim 10, wherein said rendering tag identifies a fill-order that attempts to reproduce an edge with said target pixel.

12. The compact rendering processor of claim 10, further comprising an error diffusion sub-processor coupled to receive said high addressability pixel from said rendering sub-processor, said diffusion sub-processor determining an error indicating the difference between the gray level of said target pixel and the gray level of said high addressability pixel and distributing said error to a group of pixels within said multi-level halftone image.

13. A printing system, comprising:

a digital front end adapted to receive an image file and generate multi-bit Image data;

said digital front end operative to generate multi-bit image data having both multi-level halftone regions and antialiased pixels;

a tagging processor to generate a rendering tag for a target pixel within said multi-bit image data, said rendering tag identifying a fill-order based upon a difference between a value of said target pixel and a value of a neighboring pixel; and

a rendering processor responsive to said rendering tag to convert said target pixel to a high addressability pixel; and

a marking engine, coupled to said compact rendering module, for generating an image in response to said high addressability pixels.

14. The printing system of claim 13, further comprising a diffusion processor, coupled lo said rendering processor, said diffusion processor determining a quantization error and distributing said quantization error to a number pixels within said multi-bit image data.

15. The printing system of claim 14, wherein said diffusion processor distributes a weighted portion of said quantization error to a preselected number pixels within said multi-bit image data.

16. A method of processing image data, comprising:

receiving multi-bit image data, the multi-bit image data including a target pixel and a neighboring pixel;

determining a difference between a value of the target pixel and a value of at least one neighboring pixel; and

identifying a fill-order for the target pixel using a result of the determining step.

17. The method of claim 16, wherein the step of identifying a fill-order identifies a fill-order that attempts to reproduce an edge with said target pixel.

18. The method of claim 16, wherein the step of identifying a fill-order identifies a rendering pattern that fills high addressability pixel events from a darker pixel towards a lighter pixel.

19. The method of claim 16, further comprising:

generating a high addressability pixel for the target pixel; and

diffusing an error resulting from the generating step.

20. The method of claim 19, wherein the step of diffusing an error comprises:

determining a quantization error as a function a difference between an output density of the target pixel and an output density of the high addressability pixel; and

distributing the quantization error to a preselected number of multi-bit image pixels.

21. The method of claim 20, wherein said step of distributing the quantization error distributes a weighted portion of the quantization error to a preselected number of multi-bit image pixels.