Method and apparatus to ensure functionality and timing robustness in SOI circuits
First Claim
1. Apparatus to ensure functionality and timing robustness in a silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuit comprising:
- a select signal for the SOI CMOS circuit;
a floating body charge monitoring circuit coupled to the SOI CMOS circuit for monitoring excess body charges in at least one predefined SOI device and providing an output control signal;
a select signal adjusting circuit receiving said select signal and coupled to said floating body charge monitoring circuit receiving said output control signal and providing a conditionally adjusted select signal responsive to said output control signal of said floating body charge monitor circuit;
said conditionally adjusted select signal applied to the SOI CMOS circuit.
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Accused Products
Abstract
Methods and apparatus are provided to ensure functionality and timing robustness in silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuits. A select signal for the SOI CMOS circuit is received. A floating body charge monitoring circuit is coupled to the SOI CMOS circuit for monitoring excess body charges in at least one predefined SOI device and providing an output control signal. A select signal adjusting circuit is coupled to the floating body charge monitoring circuit receiving the output control signal and the select signal and providing a conditionally adjusted select signal responsive to the output control signal of the floating body charge monitor circuit. The conditionally adjusted select signal is applied to the SOI CMOS circuit. The conditionally adjusted select signal provided by the select signal adjusting circuit responsive to the output control signal of the floating body charge monitor circuit includes a predefined delay at the trailing edge of the select signal extending the select signal pulse width. The conditionally adjusted select signal includes a shortened select signal pulse having a predefined delay at the rising edge of the select signal. The conditionally adjusted select signal includes a substantially unchanged select signal pulse width with a predefined delay of the rising edge of the select signal.
45 Citations
17 Claims
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1. Apparatus to ensure functionality and timing robustness in a silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuit comprising:
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a select signal for the SOI CMOS circuit;
a floating body charge monitoring circuit coupled to the SOI CMOS circuit for monitoring excess body charges in at least one predefined SOI device and providing an output control signal;
a select signal adjusting circuit receiving said select signal and coupled to said floating body charge monitoring circuit receiving said output control signal and providing a conditionally adjusted select signal responsive to said output control signal of said floating body charge monitor circuit;
said conditionally adjusted select signal applied to the SOI CMOS circuit.- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method to ensure functionality and timing robustness in a silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) circuit utilizing a charge monitoring circuit coupled to the SOI CMOS circuit and a select signal adjusting circuit comprising the steps of:
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utilizing said charge monitoring circuit coupled to the SOI CMOS circuit, monitoring excess body charges in at least one predefined SOI device and providing an output control signal;
applying a select signal for the SOI CMOS circuit and said output control signal to said select signal adjusting circuit;
utilizing said select signal adjusting circuit, providing a conditionally adjusted select signal responsive to said output control signal of said floating body charge monitor circuit; and
applying said conditionally adjusted select signal to the SOI CMOS circuit. - View Dependent Claims (15, 16, 17)
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Specification