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Cycle segmented prefix circuits

  • US 6,609,189 B1
  • Filed: 03/12/1999
  • Issued: 08/19/2003
  • Est. Priority Date: 03/12/1998
  • Status: Expired due to Fees
First Claim
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1. A circuit comprising:

  • a plurality of multiple input multiplexers and multiple input function generators connected in series, each multiplexer having one input that is an identity function and an output that is selected by a segment bit, and each function generator having one input that is output of the preceding multiplexer and an output that is an input to the next multiplexer, and the output of the last function generator is connected as an input to the first multiplexer.

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