Image display apparatus

• US 6,611,107 B2
• Filed: 02/27/2002
• Issued: 08/26/2003
• Est. Priority Date: 12/19/2001
• Status: Expired due to Term

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Hitachi, Ltd.
• Inventors: Mikami, Yoshiro, Akimoto, Hajime, Ouchi, Takayuki, Satou, Toshihiro
• Primary Examiner(s): Philogene, Haissa
• Application Number:
  US10/083,548
• Publication Number:
  US 20030111966A1
• Time in Patent Office: 545 Days
• Field of Search: 315/169.3, 315/169.1, 315/169.2, 345/77, 345/84, 345/90, 345/92, 345/98, 345/905, 257/59, 257/72, 257/350, 257/360, 327/91, 327/94
• US Class Current: 315/169.1
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes

Abstract

As each of sampling switch elements turns on in response to a scanning signal, a signal voltage from a signal wire is held on and written into a sampling capacitor. At this time, the signal voltage is held on the sampling capacitor on the basis of a common electrode. As the scanning signal transitions from high level to low level, each of the sampling switch elements turns off and changes into a floating state in which the sampling capacitor is electrically insulated from the signal wire and a driving TFT. As the scanning signal changes from high level to low level, each of the driving switches becomes conductive so that the signal voltage held on the sampling capacitor is applied as it is between the source and gate of the driving TFT as a bias voltage to make the driving TFT conductive, causing an organic LED to emit light.

Claims

1. An image display apparatus comprising:

a plurality of scanning wires distributively arranged in an image display region for transmitting a scanning signal;

a plurality of signal wires arranged to intersect with said plurality of scanning wires in said image display region for transmitting a signal voltage;

a plurality of current driven electro-optical display elements each arranged in a pixel region surrounded by each said scanning wire and each said signal wire and connected to a common power supply;

a plurality of driving elements each connected in series with each said electro-optical display element, connected to said common power supply, and applied with a bias voltage to drive each said electro-optical display element for display; and

a plurality of memory control circuits each for holding said signal voltage in response to said scanning signal to control driving of each said driving element based on said held signal voltage, wherein each said memory control circuit samples and holds said signal voltage while blocking a bias voltage from being applied to each said driving element, and subsequently applies each said driving element with said held signal voltage as said bias voltage.

2. An image display apparatus according to claim 1, further comprising:

a plurality of inverted scanning wires each arranged in parallel with each said scanning wire for transmitting an inverted scanning signal having a polarity opposite to that of said scanning signal,

each said memory control circuit comprising;

a main sampling switch element responsive to said scanning signal to conduct for sampling said signal voltage;

a sampling capacitor for holding the signal voltage sampled by said main sampling switch element;

an auxiliary sampling switch element responsive to said scanning signal to conduct for connecting one end of said sampling capacitor to a common electrode; and

a main driving switch element connected to the one end of said sampling capacitor and to one bias voltage applying electrode of said driving element, said main driving switch element responsive to said inverted scanning signal to conduct, and

each said sampling capacitor having the other end connected to the other bias voltage applying electrode of each said driving element.

3. An image display apparatus according to claim 2, wherein each said driving element comprises an n-type thin film transistor, each of said main sampling switch elements and said auxiliary sampling switch elements comprises an n-type thin film transistor, and each said main driving switch element comprises an n-type thin film transistor.

4. An image display apparatus according to claim 1, wherein each said memory control circuit comprises:

a main sampling switch element responsive to said scanning signal to conduct for sampling said signal voltage;

a sampling capacitor for holding the signal voltage sampled by said main sampling switch element;

an auxiliary sampling switch element responsive to said scanning signal to conduct for connecting one end of said sampling capacitor to a common electrode;

a main driving switch element connected to the one end of said sampling capacitor and to one bias voltage applying electrode of said driving element, main driving switch element conducting when the polarity of said scanning signal is inverted; and

an auxiliary driving switch element connected to the other end of said sampling capacitor and to the other bias voltage applying electrode of said driving element, said auxiliary driving switch element conducting when the polarity of said scanning signal is inverted.

5. An image display apparatus according to claim 4, wherein each said driving element comprises a p-type thin film transistor, each of said main sampling switch elements and said auxiliary sampling switch elements comprises an n-type thin film transistor, and each of said main driving switch elements and said auxiliary driving switch elements comprises a p-type thin film transistor.

6. An image display apparatus according to claim 1, further comprising:

a plurality of inverted scanning wires each arranged in parallel with each said scanning wire for transmitting an inverted scanning signal having a polarity opposite to that of said scanning signal, and

each said memory control circuit comprising;

a main sampling switch element responsive to said scanning signal to conduct for sampling said signal voltage;

a sampling capacitor for holding the signal voltage sampled by said main sampling switch element;

an auxiliary sampling switch element responsive to said scanning signal to conduct for connecting one end of said sampling capacitor to a common electrode;

a main driving switch element connected to the one end of said sampling capacitor and to one bias voltage applying electrode of said driving element, said main driving switch element responsive to said inverted scanning signal to conduct; and

an auxiliary driving switch element connected to the other end of said sampling capacitor and to the other bias voltage applying electrode of said driving element, said auxiliary driving switch element responsive to said inverted scanning signal to conduct.

7. An image display apparatus according to claim 6, wherein each said driving element comprises an n-type thin film transistor, each of said main sampling switch elements and said auxiliary sampling switch elements comprises an n-type thin film transistor, and each of said main driving switch elements and said auxiliary driving switch elements comprises an n-type thin film transistor.

8. An image display apparatus according to claim 1, wherein said plurality of current driven electro-optical display elements comprise organic LEDs, respectively.

9. An image display apparatus comprising:

a plurality of scanning wires distributively arranged in an image display region for transmitting a scanning signal;

a plurality of signal wires arranged to intersect with said plurality of scanning wires in said image display region for transmitting a signal voltage;

a plurality of current driven electro-optical display elements each arranged in a pixel region surrounded by each said scanning wire and each said signal wire and connected to a common power supply;

a plurality of driving elements each connected in series with each said electro-optical display element, connected to said common power supply, and applied with a bias voltage to drive each said electro-optical display element for display; and

a plurality of memory control circuits each for holding said signal voltage in response to said scanning signal to control driving of each said driving element based on said held signal voltage, wherein each said memory control circuit samples and holds said signal voltage while blocking a connection with each said driving element, and subsequently releases said blocked state to apply each said driving element with said held signal voltage as said bias voltage.

10. An image display apparatus comprising:

a plurality of scanning wires distributively arranged in an image display region for transmitting a scanning signal;

a plurality of signal wires arranged to intersect with said plurality of scanning wires in said image display region for transmitting a signal voltage;

a plurality of memory circuits each arranged in a pixel region surrounded by each said scanning wire and each said signal wire for holding said signal voltage in response to said scanning signal;

a plurality of current driven electro-optical display elements each arranged in said each pixel region and connected to a common power supply; and

a plurality of driving elements each connected in series with each said electro-optical display element, connected to said common power supply, and applied with a bias voltage to drive each said electro-optical display element for display;

wherein each said memory circuit includes a sampling switch element responsive to said scanning signal to conduct for sampling said signal voltage, and a sampling capacitor for holding a signal voltage sampled by said sampling switch element, each said sampling capacitor having one end connected to the common power supply through each said driving element or a power supply wire, each said sampling capacitor having the other end connected to a gate electrode of each said driving element, and

in a sampling period in which said sampling switch element of each said memory circuit holds the signal voltage, each said driving element is brought into a non-driving state by changing a voltage of said common power supply or maintaining a potential on a common electrode shared by said driving elements in said common power supply at a ground potential, and each said driving element is applied with a bias voltage after said sampling period has passed.

11. An image display apparatus comprising:

a plurality of scanning wires distributively arranged in an image display region for transmitting a scanning signal;

a plurality of signal wires arranged to intersect with said plurality of scanning wires in said image display region for transmitting a signal voltage;

a plurality of memory circuits each arranged in a pixel region surrounded by each said scanning wire and each said signal wire for holding said signal voltage in response to said scanning signal;

a plurality of current driven electro-optical display elements each arranged in said each pixel region and connected to a common power supply;

a plurality of driving elements each connected in series with each said electro-optical display element, connected to said common power supply, and applied with a bias voltage to drive each said electro-optical display element for display; and

a plurality of power supply control elements for controlling electric power supplied from said common power supply to each said driving element,

wherein each said memory circuit includes a sampling switch element responsive to said scanning signal to conduct for sampling said signal voltage, and a sampling capacitor for holding a signal voltage sampled by said sampling switch element, each said sampling capacitor having one end connected to the common power supply through each said driving element or a power supply wire, each said sampling capacitor having the other end connected to a gate electrode of each said driving element, and

in a sampling period in which said sampling switch element of each said memory circuit holds the signal voltage, each said power supply control element stops supplying the electric power to each said driving element, and supplies the electric power to each said driving element after said sampling period has passed.

12. An image display apparatus according to claim 11, wherein each of said sampling switch elements, said driving elements and said power supply control elements comprises an n-type thin film transistor, and each said power supply control element is responsive to a reference control signal to conduct when the reference control signal changes to a high level in a period out of said sampling period.

13. An image display apparatus according to claim 11, wherein each of said sampling switch elements and said driving elements comprises an n-type thin film transistor, and each said power supply control element comprises a p-type thin film transistor, and is responsive to the scanning signal to conduct when the scanning signal changes to a low level in a period out of said sampling period.

14. An image display apparatus according to claim 11, wherein each of said sampling switch elements, said driving elements and said power supply control elements comprises an n-type thin film transistor, and each said power supply control element is responsive to a reference control signal to conduct when the reference control signal changes to a low level in a period out of said sampling period.

15. An image display apparatus comprising:

a plurality of scanning wires distributively arranged in an image display region for transmitting a scanning signal;

a plurality of signal wires arranged to intersect with said plurality of scanning wires in said image display region for transmitting a signal voltage;

a plurality of current driven electro-optical display elements each arranged in a pixel region surrounded by each said scanning wire and each said signal wire and connected to a common power supply;

a plurality of driving elements each connected in series with each said electro-optical display element, connected to said common power supply, and applied with a bias voltage to drive each said electro-optical display element for display; and

a plurality of memory control circuits each for holding said signal voltage in response to said scanning signal to control driving of each said driving element based on said held signal voltage, wherein each memory control circuit executes a sampling operation for sampling said signal voltage in response to said scanning signal and holding the sampled signal voltage, a floating operation, following said sampling operation, for holding said signal voltage in an electrically insulated state from each said signal wire and each said driving element, and a bias voltage applying operation, following said floating operation, for applying each said driving element with said held signal voltage as a bias voltage.