Interactive memory allocation in a behavioral synthesis tool
First Claim
1. A method of allocating memory in a behavioral synthesis tool used to design an integrated circuit, comprising:
- reading a source code description associated with the integrated circuit into the behavioral synthesis tool, the source code description having at least one array;
storing the source code description as a data structure within the behavioral synthesis tool; and
using a graphical user interface to map the array to a memory to be used by the integrated circuit by modifying the data structure within the behavioral synthesis tool.
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Abstract
A behavioral synthesis tool for generating an integrated circuit design is described. The behavioral synthesis tool allows a designer to interactively allocate variables or arrays to memory resources without having to modify a source code description of the integrated circuit. The behavioral synthesis tool reads the source code description and generates a synthesis intermediate format stored in memory. The synthesis tool searches the in-memory synthesis intermediate format to find arrays for each process. The arrays are then listed in a graphical user interface (GUI). The GUI allows the designer to create memory resources, specifying the type of memory, the packing mode, etc. The designer can then drag and drop the array variables listed in the GUI onto the memory resources. Upon completion of modifying the memory allocation, the designer saves the changes illustrated in the GUI and such changes are effectuated by automatically updating the synthesis intermediate format.
108 Citations
29 Claims
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1. A method of allocating memory in a behavioral synthesis tool used to design an integrated circuit, comprising:
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reading a source code description associated with the integrated circuit into the behavioral synthesis tool, the source code description having at least one array;
storing the source code description as a data structure within the behavioral synthesis tool; and
using a graphical user interface to map the array to a memory to be used by the integrated circuit by modifying the data structure within the behavioral synthesis tool. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
using the graphical user interface, creating a memory resource to be used by the integrated circuit; and
using the graphical user interface, creating an association between an array with the memory resource using a drag-and-drop operation.
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11. The method of claim 10, further including dragging the graphical object representation of the array to the memory resource and dropping the object on the memory resource.
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12. The method of claim 1, further including displaying an association between arrays and memories using a hierarchical representation.
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13. The method of claim 1, wherein the graphical user interface is used to assign arrays to memory resources and further including automatically updating the data structure in response to user input indicating that memory allocation is complete.
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14. A computer-readable medium having computer-executable instructions for performing the method of claim 1.
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15. A synthesis tool that allows for interactive memory allocation in the design of integrated circuits, comprising:
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a source code description file that describes functionality of an integrated circuit;
memory that stores an intermediate database associated with a source code description file of the integrated circuit; and
a graphical user interface that allows a designer to interactively allocate memory for the integrated circuit by modifying the database and without modifying the source code description file. - View Dependent Claims (16, 17, 18)
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19. A behavioral synthesis tool, comprising:
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means for generating a synthesis intermediate format associated with a source code description of an integrated circuit; and
means for allowing a user to interactively modify memory allocation by modifying the synthesis intermediate format. - View Dependent Claims (20, 21)
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22. A method of allocating memory in a behavioral synthesis tool used to design an integrated circuit, comprising:
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displaying, in a graphical user interface, array variables associated with a source code description of the integrated circuit;
displaying, in the graphical user interface, memory resources associated with the integrated circuit; and
assigning the array variables to the memory resources using the graphical user interface. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29)
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Specification