Boosting circuit of semiconductor memory device
First Claim
1. A boosting unit for generating a boosted voltage having a voltage level higher than a power supply voltage level, said boosting unit comprising:
- a plurality of boosting circuits connected together in series, wherein each of the boosting circuits is configured to boost an input voltage to produce an output voltage at an output terminal, wherein each of the boosting circuits is configured to operate in response to a corresponding boosting signal, wherein each of the boosting signals is configured to be enabled and disabled simultaneously with each of the other boosting signals, and wherein a final boosting circuit comprises a boosting control circuit for controlling boosting efficiency of a final boosted voltage in response to a boosting selection signal.
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Abstract
A boosting unit comprises a plurality of boosting circuits. Each boosting circuit includes an input driving circuit, a switching circuit, a capacitor circuit, and a precharge circuit. The input driving circuit drives a corresponding external boosting signal. The switching circuit transfers either a power supply voltage, a ground voltage, or a boosting signal from one of the other boosting circuits to the capacitor circuit under the control of the corresponding external boosting signal. The capacitor circuit boosts up a boosting node, which has been precharged to a power supply voltage level by the precharge circuit, to predetermined voltage level higher than an input voltage level. The boosting circuits are connected together in series and simultaneously carry out a boosting operation. The boosting unit therefore provides a desired boosted voltage level at high speed.
34 Citations
12 Claims
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1. A boosting unit for generating a boosted voltage having a voltage level higher than a power supply voltage level, said boosting unit comprising:
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a plurality of boosting circuits connected together in series, wherein each of the boosting circuits is configured to boost an input voltage to produce an output voltage at an output terminal, wherein each of the boosting circuits is configured to operate in response to a corresponding boosting signal, wherein each of the boosting signals is configured to be enabled and disabled simultaneously with each of the other boosting signals, and wherein a final boosting circuit comprises a boosting control circuit for controlling boosting efficiency of a final boosted voltage in response to a boosting selection signal. - View Dependent Claims (2)
a precharge circuit for charging the output terminal of the boosting circuit with a precharge voltage in response to a precharge signal;
a capacitor circuit connected to the output terminal of the boosting circuit; and
a switching circuit for connecting the capacitor circuit to a first or a second power supply voltage to selectively charge or discharge the capacitor circuit in response to the corresponding boosting signal, and wherein the capacitor circuit comprises a first terminal connected to the corresponding switching circuit, and a second terminal connected to the output terminal of the boosting circuit, and wherein the switching circuit comprises first and second switching transistors, the first switching transistor being connected between the first power supply voltage and the first terminal of the boosting capacitor and configured to be switched by the corresponding boosting signal, and the second switching transistor being connected between the second power supply voltage and the first terminal of the boosting capacitor and configured to be switched by the corresponding boosting signal.
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3. A boosting unit for generating a boosted voltage having a voltage level higher than a power supply voltage level, said boosting unit comprising:
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a plurality of boosting circuits connected together in series, each boosting circuit comprising a precharge circuit for charging the output terminal of the boosting circuit with a precharge voltage in response to a precharge signal, a capacitor circuit connected to the output terminal of the boosting circuit, and a switching circuit for connecting the capacitor circuit to a first or a second power supply voltage to selectively charge or discharge the capacitor circuit in response to the corresponding boosting signal, wherein each of the boosting circuits is configured to boost an input voltage to produce an output voltage at an output terminal, wherein each of the boosting circuits is configured to operate in response to a corresponding boosting signal, wherein each of the boosting signals is configured to be enabled and disabled simultaneously with each of the other boosting signals, and wherein the capacitor circuit comprises a plurality of boosting capacitors, said capacitor circuit having a first terminal connected to the switching circuit and a second terminal connected to the output terminal of the boosting circuit, the boosting capacitors being connected together in parallel.
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4. A boosting unit for generating a boosted voltage having a voltage level higher than a power supply voltage level, said boosting unit comprising:
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a plurality of boosting circuits connected together in series, each boosting circuit comprising a precharge circuit for charging the output terminal of the boosting circuit with a precharge voltage in response to a precharge signal, a capacitor circuit connected to the output terminal of the boosting circuit, and a switching circuit for connecting the capacitor circuit to a first or a second power supply voltage to selectively charge or discharge the capacitor circuit in response to the corresponding boosting signal, wherein each of the boosting circuits is configured to boost an input voltage to produce an output voltage at an output terminal, wherein each of the boosting circuits is configured to operate in response to a corresponding boosting signal, wherein each of the boosting signals is configured to be enabled and disabled simultaneously with each of the other boosting signals, and wherein the switching circuit comprises;
a plurality of first switching transistors connected between the first power supply voltage and a first terminal of a corresponding boosting capacitor, said first switching transistors configured to be switched by the corresponding boosting signal; and
a plurality of second switch transistors being connected between the second power supply voltage and the first terminal of the corresponding boosting capacitor, said second switching transistors being configured to be swished by the corresponding boosting signal. - View Dependent Claims (5)
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6. A boosting unit for generating a boosted voltage having a voltage level higher than a power supply voltage level, the boosting unit comprising:
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a plurality of boosting circuits connected in series, wherein each of the boosting circuits boosts up an input voltage in response to a corresponding boosting signal and outputs an output voltage that is higher than the input voltage; and
a boosting control unit for generating a boosting control signal to control a final boosting circuit in response to a boosting signal and a row address, wherein the final boosting circuit selectively outputs a final boosted voltage through an output terminal thereof that corresponds to the row address, in response to the boosting control signal. - View Dependent Claims (7, 8, 9, 10, 11, 12)
a precharge circuit for precharging the output terminal of the boosting circuit with a precharge voltage in response to a precharge signal;
a capacitor circuit connected to the output terminal of the boosting circuit; and
a switching circuit for connecting the capacitor circuit to a first or a second power supply voltage to charge or discharge the capacitor circuit in response to the corresponding boosting signal.
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8. A boosting unit according to claim 6, wherein the final boosting circuit further comprises a boosting control circuit for controlling a boosting efficiency of a final boosted voltage in response to a plurality of boosting selection signals.
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9. A boosting unit according to claim 6, wherein the boosting control unit further comprises a plurality of control circuits for outputting the boosting control signals in response to the boosting signal and a corresponding one of the row addresses, wherein each of the boosting control circuits comprises:
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a NAND-type gate for generating an output signal by NAND-gating the boosting signal and the corresponding row address; and
a level shifter for receiving a boosted voltage from a previous one of the boosting circuits and for supplying the boosted voltage to a corresponding boosting circuit in response to the output signal from the NAND-type gate.
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10. A boosting unit according to claim 7, wherein the capacitor circuit comprises a first terminal connected to the corresponding switching circuit and a second terminal connected to the output terminal of the corresponding boosting circuit, and wherein the switching circuit comprises a first transistor connected between the first power supply voltage and the first terminal of the boosting capacitor, the first transistor configured to be switched by the corresponding boosting signal;
- and a second transistor connected between the second power supply voltage and the first terminal of the boosting capacitor, the second transistor configured to be switched by the corresponding boosting signal.
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11. A boosting unit according to claim 7, wherein the capacitor circuit comprises a plurality of boosting capacitors each having a second terminal connected to the output terminal of a corresponding boosting means and a first terminal connected to a corresponding switching circuit, and wherein the boosting capacitors are connected together in parallel.
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12. A boosting unit according to claim 8, wherein the switching circuit comprises:
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a plurality of first switching transistors, each connected between the first power supply voltage and a first terminal of a boosting capacitor, and configured to be switched by the corresponding boosting signal; and
a plurality of second switching transistors, each connected between the second power supply voltage and the first terminal of the boosting capacitor, and configured to be switched by the corresponding boosting signal.
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Specification