High performance switched-capacitor filter for oversampling Sigma-Delta digital to analog converters

• US 6,614,374 B1
• Filed: 05/14/2001
• Issued: 09/02/2003
• Est. Priority Date: 06/15/1999
• Status: Expired due to Fees

• Current Assignee: Conexant Incorporated (Synaptics Incorporated)
• Original Assignee: GlobespanVirata, Inc. (Synaptics Incorporated)
• Inventors: Tan, Nianxiong, Gustavsson, Mikael
• Primary Examiner(s): Tokar, Michael
• Assistant Examiner(s): NGUYEN, LINH V
• Application Number:
  US09/855,080
• Time in Patent Office: 841 Days
• Field of Search: 708/313, 708/319, 708/320, 341/61, 341/143, 341/144, 341/118, 341/120, 364/724.1, 364/724.16, 360/46, 360/65, 360/67, 360/48, 333/167
• US Class Current: 341/143
• CPC Class Codes: H03H 19/004 Switched capacitor networks

Abstract

A SINC filter for an oversampling Sigma-Delta digital to analog converter (OSDAC) having a cascaded construction that results in reduced sensitivity to capacitor mismatch. Specifically, the SINC filter circuit filter may be defined by a transfer function H(z), which is further defined by first constituent transfer functions H₁(z) and H₂(z). The constituent transfer functions may be implemented in a cascaded fashion. Preferably, one of the cascaded sections includes a resistor string that defines a plurality of reference voltages. A plurality of switching elements are configured to controllably switch these reference voltages to a capacitor of a tap.

Claims

1. A filter for oversampling Sigma-Delta digital-to-analog converter circuits, comprising:

a SINC filter that decimates a digital data input signal by a predetermined factor of an over-sampling ratio utilized by a Sigma-Delta modulator, the SINC filter being defined by a cascaded architecture; and

a switched-capacitor biquad filter having a programmable cut-off frequency which tracks the over-sampling ratio.

7. The filter of claim 1, wherein capacitor switching is applied in response to the applicable digital subscriber line application mode.

8. The filter of claim 1, wherein one of the cascaded sections includes a plurality of series connected resistors defining a plurality of intermediate reference voltages.

9. The filter of claim 8, further including a plurality of switching element configured to switch one of the reference voltages to a capacitor.

10. A central office digital subscriber line transmission unit utilizing the filter of claim 1.

11. An integrated circuit comprising the filter of claim 1.

2. The filter of claim Error! Bookmark not defined., wherein the cascaded SINC filter is defined by first and second cascaded sections, wherein the SINC filter is defined by a transfer function H(z), which is further defined by first and second constituent transfer functions H₁(z) and H₂(Z).

3. The filter of claim 2, where H₁(z) is the transfer function defining the first cascaded section and H₂(Z) is the transfer function defining the second section, and further wherein:

$H_1<br><br>\left(z\right)=\frac{1}{4}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^1=\frac{1+1·<br><br>z^{-1}+1·<br><br>z^{-2}+1·<br><br>z^{-3}}{4}<br><br>\text{\hspace{1em}<br><br>}<br><br>\mathrm{and}$$H_2<br><br>\left(z\right)=\frac{1}{16}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^2=\frac{1+2·<br><br>z^{-1}+3·<br><br>z^{-2}+4·<br><br>z^{-3}+3·<br><br>z^{-4}+2·<br><br>z^{-5}+1·<br><br>z^{-6}}{16}.$

4. The filter of claim 3, wherein the first cascaded section is implemented by a combination of a digital filter and capacitor switched to a resistor string.

5. The filter of claim 4, wherein the second cascaded section is implemented using a plurality of capacitors switched to the resistor string.

6. The filter of claim 2, wherein the first cascaded section is a first order filter.

12. A SINC filter for an oversampling Sigma-Delta digital-to-analog converter circuit, comprising:

first and second cascaded sections, wherein the SINC filter is defined by a transfer function H(z), which is further defined by first and second constituent transfer functions H₁(z) and H₂(z) a switched-capacitor biquad filter having a cut-off frequency which tracks the over-sampling ratio.

13. The filter of claim 12, where H₁(z) is the transfer function defining the first cascaded section and H₂(z) is the transfer function defining the second section, and further wherein:

$H_1<br><br>\left(z\right)=\frac{1}{4}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^1=\frac{1+1·<br><br>z^{-1}+1·<br><br>z^{-2}+1·<br><br>z^{-3}}{4}<br><br>\text{\hspace{1em}<br><br>}<br><br>\mathrm{and}$$H_2<br><br>\left(z\right)=\frac{1}{16}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^2=\frac{1+2·<br><br>z^{-1}+3·<br><br>z^{-2}+4·<br><br>z^{-3}+3·<br><br>z^{-4}+2·<br><br>z^{-5}+1·<br><br>z^{-6}}{16}.$

14. The filter of claim 13, wherein the second cascaded section is implemented using a plurality of capacitors switched to a resistor string.

15. The filter of claim 12, wherein one of the cascaded sections includes a plurality of series connected resistors defining a plurality of intermediate reference voltages.

16. The filter of claim 15, further including a plurality of switching element configured to switch one of the reference voltages to a capacitor.

17. The filter of claim 12, wherein the first cascaded section is implemented by a digital SINC and a delay line with decimation.

18. The filter of claim 13, wherein the first cascaded section is a first order filter.

19. A filter for oversampling Sigma-Delta digital-to-analog converter circuits, comprising:

a SINC filter that decimates a digital data input signal by a predetermined factor of an over-sampling ratio utilized by a Sigma-Delta modulator, the SINC filter being defined by a cascaded architecture that is defined by first and second cascaded sections having first and second constituent transfer functions H₁(z) and H₂(z), wherein;

$H_1<br><br>\left(z\right)=\frac{1}{4}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^1=\frac{1+1·<br><br>z^{-1}+1·<br><br>z^{-2}+1·<br><br>z^{-3}}{4}<br><br>\text{\hspace{1em}<br><br>}<br><br>\mathrm{and}$$H_2<br><br>\left(z\right)=\frac{1}{16}·<br><br>{\left(\frac{1-z^{-4}}{1-z^{-1}}\right)}^2=\frac{1+2·<br><br>z^{-1}+3·<br><br>z^{-2}+4·<br><br>z^{-3}+3·<br><br>z^{-4}+2·<br><br>z^{-5}+1·<br><br>z^{-6}}{16};<br><br>\mathrm{and}$

a switched-capacitor biquad filter having a programmable cut-off frequency, which tracks the over-sampling ratio.