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High-frequency integrated inductive winding

  • US 6,617,665 B2
  • Filed: 04/18/2002
  • Issued: 09/09/2003
  • Est. Priority Date: 04/20/2001
  • Status: Active Grant
First Claim
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1. An inductance formed in an integrated circuit chip, formed of a plurality of parallel conductive lines of optimized width and having a length, each conductive line being formed in a thickness of at least one insulating layer, these lines being interconnected only by a plurality of perpendicular conductive segments, the segments being separated from one another in the direction of the length, each of the plurality of conductive lines extending over the entire length of the inductance and each conductive segment extending over the entire width of the inductance.

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