Display apparatus

• US 6,618,029 B1
• Filed: 02/25/1999
• Issued: 09/09/2003
• Est. Priority Date: 07/02/1997
• Status: Expired due to Term

• Current Assignee: Intellectual Keystone Technology LLC
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Ozawa, Tokuroh
• Primary Examiner(s): Lao, Lun-Yi
• Application Number:
  US09/242,904
• Time in Patent Office: 1,657 Days
• Field of Search: 345/70-83, 345/209, 345/204-206, 345/92, 345/44, 345/46, 315/169.1, 315/169.3, 257/40, 257/59, 257/72, 349/48, 313/505, 313/504
• US Class Current: 345/82
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/30 using electroluminescent panels
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/88 Dummy elements, i.e. elements having non-functional features

Abstract

A display apparatus is provided which is capable of improving display quality by expanding the light-emission area of pixels by improving the layout of pixels and common power-feed lines formed on a substrate. Pixels including a light-emission element, such as an electroluminescence element or an LED element, are arranged on both sides of common power-feed lines so that the number of common power-feed lines is reduced. Further, the polarity of a driving current flowing between the pixels and the light-emission element is inverted so that the amount of current flowing through the common power-supply lines is reduced.

Claims

1. A display apparatus comprising:

a plurality of scanning lines;

a plurality of data lines;

a plurality of common power-feed lines;

a plurality of pixels corresponding to intersections of the plurality of scanning lines and the plurality of data lines,

one pixel of the plurality of pixels comprising;

a first transistor having a first gate electrode connected to one scanning line of the plurality of scanning lines;

a holding capacitor that holds a signal supplied from one data line of the plurality of data lines via the first transistor;

a second transistor having a second gate electrode connected to the holding capacitor; and

a light-emission element having an organic semiconductor film which emits a light by a driving current that flows between a pixel electrode and counter electrode when the pixel electrode is electrically connected to a corresponding common power-feed line of the plurality of common power-feed lines, the organic semiconductor film being surrounded by a bank layer,

the one data line passing on a side opposite to the corresponding common power-feed line with respect to the one pixel; and

the bank layer overlapping the corresponding common power-feed line.

2. The display apparatus according to claim 1, the corresponding common power-feed line being disposed in such a manner that the corresponding common power-feed line is sandwiched between the one pixel and another pixel.

3. The display apparatus according to claim 2,

the first transistor in the one pixel and a first transistor in the another pixel, the second transistor in the one pixel and a second transistor in the another pixel, and the light emission-element in the one pixel and a light-emission element in the another pixel being disposed in linear symmetry with respect to the corresponding common-feed line, respectively.

4. The display apparatus according to claim 1,

the plurality of pixels including a set of pixels each of which has a light-emission element disposed along one of the scanning lines, every pixel of the set of pixels being disposed in such a manner that an interval between centers of organic semiconductor films included in light-emission elements of every two adjacent pixels of the set of pixels is the same.

5. The display apparatus according to claim 1,

the bank layer overlapping the one data line of the plurality of data lines.

6. The display apparatus according to claim 1,

the organic semiconductor film being formed by an ink-jet method.

7. The display apparatus according to claim 1,

further comprising a wiring layer being disposed between two adjacent data lines of the plurality of data lines.

8. The display apparatus according to claim 7,

sampling of a signal at the two adjacent data lines being performed at the same time.

9. The display apparatus according to claim 1,

a polarity of a driving current driving the light-emission element of the one pixel being inverted to a polarity of a driving current driving a light-emission element of the another pixel.

10. The display apparatus according to claim 1,

the plurality of pixels including a set of pixels having light-emission elements disposed along one of the plurality of scanning lines, a polarity of a driving current driving a light-emission element of each pixel of the set of pixels being inverted to a polarity of a driving current a light-emission element of a pixel adjacent to each pixel of the set of pixels.

11. The display apparatus according to claim 1,

the plurality of pixels including a set of pixels having light-emission elements disposed along one of the plurality of scanning lines, a polarity of a driving current driving light-emission elements of every two pixels of the set of pixels being the same.

12. The display apparatus according to claim 1,

the plurality of pixels including a set of pixels having light-emission elements disposed along one of the plurality of data lines, a polarity of a driving current driving a light-emission element of each pixel of the set of pixels being inverted to a polarity of a driving current of a light-emission element of a pixel adjacent to each pixel of the set of pixels.

13. The display apparatus according to claim 1,

the plurality of pixels including a set of pixels having light-emission elements disposed along one of the plurality of data lines, a polarity of a driving current driving light-emission elements of every two pixels of the set of pixels being the same.

14. The display apparatus according to claim 1,

a polarity of a driving current driving light-emission element of each pixel of a set of pixels having light-emission elements of the plurality of pixels being inverted to a polarity of a driving current a light-emission element of all pixels adjacent to each pixel of the set of pixels.

15. A display apparatus comprising:

a plurality of scanning lines;

a plurality of data lines;

a plurality of common power-feed lines;

a plurality of pixels corresponding to intersections of the plurality of scanning lines and the plurality of data lines;

one pixel of the plurality of pixels comprising;

a first transistor having a first gate electrode connected to one scanning line of the plurality of scanning lines;

a holding capacitor that holds a signal supplied from one data line of the plurality of data lines via the first transistor;

a second transistor having a second gate electrode connected to the holding capacitor; and

a light-emission element having an organic semiconductor film which emits a light by a driving current that flows between a pixel electrode and counter electrode when the pixel electrode is electrically connected to a corresponding common power-feed line of the plurality of common power-feed lines, the organic semiconductor film being surrounded by a bank layer;

at least a part of the bank layer overlapping the corresponding common power-feed line.

16. The display apparatus according to claim 15,

at least a part of the bank layer overlapping the one data line.

17. The display apparatus according to claim 15,

the corresponding common power-feed line being disposed in such a manner that the corresponding common power-feed line is sandwiched between the one pixel and another pixel.

18. A display apparatus comprising:

a plurality of scanning lines;

a plurality of data lines;

a plurality of common power-feed lines;

a plurality of pixels corresponding to intersections of the plurality of scanning lines and the plurality of data lines;

one pixel of the plurality of pixels comprising;

a first transistor having a first gate electrode connected to one scanning line of the plurality of scanning lines;

a holding capacitor that holds a signal supplied from one data line of the plurality of data lines via the first transistor;

a second transistor having a second gate electrode connected to the holding capacitor; and

a light-emission element having an organic semiconductor film which emits a light by a driving current that flows between a pixel electrode and counter electrode when the pixel electrode is, electrically connected to a corresponding common power-feed line of the plurality of common power-feed lines, the organic semiconductor film being surrounded by a bank layer;

the one data line passing on a side opposite to the corresponding common power-feed line with respect to the one pixel; and

the line width of the corresponding common power-feed line being set to be wider than that of the one data line.

19. The display apparatus according to claim 18, the corresponding common power-feed line being disposed in such a manner that the corresponding common power-feed line is sandwiched between the one pixel and another pixel.

20. The display apparatus according to claim 18,

at least a part of the bank layer overlapping the corresponding common power-feed line.

21. The display apparatus according to claim 18,

at least a part of the bank layer overlapping the one data line.

22. A display apparatus comprising:

a plurality of scanning lines;

a plurality of data lines;

a plurality of common power-feed lines;

a plurality of pixels corresponding to intersections of the plurality of scanning lines and the plurality of data lines;

one pixel of the plurality of pixels comprising;

a first transistor having a first gate electrode connected to one scanning line of the plurality of scanning lines;

a holding capacitor that holds a signal supplied from one data line of the plurality of data lines via the first transistor;

a second transistor having a second gate electrode connected to the holding capacitor; and

a light-emission element having an organic semiconductor film which emits a light by a driving current that flows between a pixel electrode and counter electrode when the pixel electrode is electrically connected to a corresponding common power-feed line of the plurality of common power-feed lines, the organic semiconductor film being surrounded by a bank layer;

the line width of the corresponding common power-feed line being set to be wider than that of the one data line.

23. The display apparatus according to claim 22,

at least a part of the bank layer overlapping the corresponding common power-feed line.

24. The display apparatus according to claim 22,

at least a part of the bank layer overlapping the one data line.