Tunable filter with bypass

• US 6,618,579 B1
• Filed: 09/24/1999
• Issued: 09/09/2003
• Est. Priority Date: 09/24/1999
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: The Chase Manhattan Bank (JP Morgan Chase & Co)
• Inventors: Smith, Malcolm H., Risk, Valerie J., Lesher, Mark K.
• Primary Examiner(s): Trost, William
• Assistant Examiner(s): SOBUTKA, PHILIP
• Application Number:
  US09/405,744
• Time in Patent Office: 1,446 Days
• Field of Search: 455/73, 455/75, 455/77, 455/307, 455/220, 455/221, 455/222, 455/223, 327/552, 327/553, 327/554, 327/558, 327/561, 607/5
• US Class Current: 455/307
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 2210/025 Capacitor
• CPC Class Codes: H03H 2210/036 Stepwise
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank

Abstract

An electrical circuit which includes a filter bypass mode. The circuit includes an amplifier including an inverting terminal, a noninverting terminal and an output terminal, at least one first capacitor coupled to the inverting terminal of the amplifier through at least one first switch, and, at least one second capacitor coupled to the noninverting terminal of the amplifier through at least one second switch. The electrical circuit provides filtering when the first and second switches are in a first state, and when the first and second switches are in a second state, the electrical circuit provides substantially no filtering.

Claims

1. An integrated circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch; and

at least one second capacitor coupled between the inverting terminal of the amplifier and the noninverting terminal of the amplifier through at least one second switch, wherein when the second switch is in a first state, the integrated circuit provides filtering, and when the second switch is in a second state, the integrated circuit provides no filtering,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

2. The integrated circuit of claim 1, wherein the at least one first switch comprises a MOSFET switch.

3. The integrated circuit of claim 1, wherein the at least one second switch comprises a MOSFET switch.

4. The integrated circuit of claim 1, wherein the at least one first switch and the at least one second switch are coupled between the amplifier and the at least one first and second capacitors respectively.

5. The integrated circuit of claim 1, wherein the circuit is formed as an integrated circuit.

6. The integrated circuit of claim 1, wherein the at least one first capacitor comprises a first plurality of capacitors and the at least one first switch comprises a first plurality of switches.

7. The integrated circuit of claim 6, wherein each of the first plurality of switches can be switched independently of one another.

8. The integrated circuit of claim 6, wherein each of the capacitors of the first plurality of capacitors are coupled in parallel with one another.

9. The integrated circuit of claim 1, wherein the at least one second capacitor comprises a second plurality of capacitors and the at least one second switch comprises a second plurality of switches.

10. The integrated circuit of claim 9, wherein each of the second plurality of switches can be switched independently of one another.

11. The integrated circuit of claim 9, wherein each of the capacitors of the second plurality of capacitors are coupled in parallel with one another.

12. An integrated circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal; and

,

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering,

wherein in the first state the circuit acts as a low pass filter.

13. An integrated circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch; and

a first resistor coupled between the noninverting terminal of the amplifier and an input terminal of the integrated circuit,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

14. An integrated circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch;

a first resistor coupled between the inverting terminal of the amplifier and the noninverting terminal of the amplifier; and

,

a second resistor coupled between the inverting terminal of the amplifier and ground,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

15. An integrated circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and at least two output terminals;

at least one first capacitor coupled between the noninverting terminal of the amplifier and one of the at least two output terminals of the amplifier through at least one first switch;

at least one second capacitor coupled between the inverting terminal of the amplifier and the other of the at least two output terminals of the amplifier through at least one second switch; and

,

at least one third capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one third switch,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

16. The integrated circuit of claim 15, further comprising:

at least one fourth capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one fourth switch.

17. A tunable filter circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal; and

,

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch,

a first resistor coupled between the noninverting terminal of the amplifier and an input terminal of the filter,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

18. A tunable filter circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch; and

,

at least one second capacitor coupled between the inverting terminal of the amplifier and the noninverting terminal of the amplifier through at least one second switch, wherein when the second switch is in a first state, the filter circuit provides filtering, and when the second switch is in a second state, the filter circuit provides no filtering,

wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

19. A tunable filter circuit comprising:

an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and the output terminal of the amplifier through at least one first switch; and

,

at least one third capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one third switch,

wherein when the first switch is in a first state, the filter circuit provides filtering, and when the first switch is in a second state, the filter circuit provides no filtering.

20. The tunable filter circuit of claim 19, further comprising:

at least one fourth capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one fourth switch.

21. A method of bypassing a filter circuit comprising the steps of:

providing at least one switched filtering element in a filtering circuit; and

,

switching the filtering element out of the filter circuit in order to bypass the filter circuit.

22. The method of claim 21, wherein the at least one capacitor comprises a plurality of capacitors, and the at least one switch comprises a plurality of switches.

23. The method of claim 22, comprising the further step of:

selectively switching independent ones of the plurality of switches to change the filtering characteristics of the filter circuit.

24. A wireless communications device comprising:

one of the group consisting of a transmitter and a receiver; and

,

a tunable filter circuit, coupled to the transmitter or receiver, comprising an amplifier including an inverting terminal, a noninverting terminal and an output terminal;

at least one first capacitor coupled between the noninverting terminal of the amplifier and ground through at least one first switch; and

at least one second capacitor coupled between the inverting terminal of the amplifier and the noninverting terminal of the amplifier through at least one second switch, wherein when the second switch is in a first state, the integrated circuit provides filtering, and when the second switch is in a second state, the integrated circuit provides no filtering, wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering.

25. The wireless communications device of claim 24, further comprising:

the other of the group consisting of a transmitter and a receiver.

26. A wireless communications device comprising:

one of the group consisting of a transmitter and a receiver; and

,

a tunable filter circuit, coupled to the transmitter or receiver, comprising an amplifier including an inverting terminal, a noninverting terminal and at least two output terminals;

at least one first capacitor coupled between the noninverting terminal of the amplifier and one of the at least two output terminals of the amplifier through at least one first switch; and

, at least one second capacitor coupled between the inverting terminal of the amplifier and the other of the at least two output terminals of the amplifier through at least one second switch, wherein when the first switch is in a first state, the integrated circuit provides filtering, and when the first switch is in a second state, the integrated circuit provides no filtering, further comprising,

at least one third capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one third switch.

27. The integrated circuit of claim 26, further comprising:

at least one fourth capacitor coupled between the inverting terminal and the noninverting terminal of the amplifier through at least one fourth switch.