Method of fabricating a semiconductor device by calcium doping a copper surface using a chemical solution

• US 6,624,074 B1
• Filed: 08/13/2002
• Issued: 09/23/2003
• Est. Priority Date: 11/30/2000
• Status: Expired due to Term

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Lopatin, Sergey, King, Paul L., Bernard, Joffre F.
• Primary Examiner(s): Fahmy, Wael
• Assistant Examiner(s): PHAM, HOAI V
• Application Number:
  US10/218,532
• Time in Patent Office: 406 Days
• Field of Search: 257/762, 257/744, 257/750, 257/741, 438/602, 438/652, 438/687, 438/761
• US Class Current: 438/687
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method of fabricating a semiconductor device having contaminant-reduced Ca-doped Cu surfaces formed on Cu interconnects by cost-effectively depositing a Cu—Ca—X surface and subsequently removing the contaminant layer contained therein; and a device thereby formed. In the Cu—Ca—X surface, where contaminant X═C, S, and O, removal of the contaminant from such surface is achieved by (a) immersing the Cu interconnect surface into an electroless plating solution comprising Cu salts, Ca salts, their complexing agents, a reducing agent, a pH adjuster, and at least one surfactant for facilitating Ca-doping of the Cu interconnect material; and (b) annealing of the Cu—Ca—X surface under vacuum onto the underlying Cu interconnect material to form a Cu—Ca film on Cu interconnect structure, thereby producing a uniform Cu—Ca film (i.e., Cu-rich with 0.2-5% Ca) on the Cu surface of an interconnect for maximizing Ca—Cu/Cu interconnect structure reliability, electromigration resistance, and corrosion prevention. The annealing step primarily removes O and secondarily removes C and S, especially when performed under vacuum, an inert gas, or a reducing ambient such as ammonia (NH₃) plasma. Thus, the resultant device then comprises a distinctive contaminant-reduced Ca—Cu/Cu interconnect structure.

Claims

1. A method of fabricating a semiconductor device, having a contaminant-reduced Cu—

Ca/Cu interconnect structure, comprising;

providing a semiconductor substrate;

forming a Cu film on the semiconductor substrate; and

forming a contaminant-reduced Cu—

Ca film on the Cu film, said contaminant-reduced Cu—

Ca film forming step comprising;

utilizing an electroless plating treatment, using an electroless plating solution, for facilitating doping the Cu film with at least one plurality of ions selected from a group consisting of Cu ions and Ca ions and for facilitating forming a Cu—

Ca—

X film on the Cu film, X denoting at least one contaminant, and

utilizing an annealing treatment for facilitating forming the contaminant-reduced Cu—

Ca film on the Cu film and for facilitating forming the contaminant-reduced Cu—

Ca/Cu interconnect structure on the semiconductor device, the contaminant-reduced Cu—

Ca interconnect structure comprising the contaminant-reduced Cu—

Ca film.

2. A method, as recited in claim 1, wherein the Cu film forming step comprises utilizing a technique selected from a group consisting of electroplating, electroless plating, chemical vapor deposition (CVD), plasma vapor deposition (PVD), and plasma enhanced chemical vapor deposition (PECVD).

3. A method, as recited in claim 1, wherein the step of utilizing the electroless plating treatment comprises using the electroless plating solution comprising:

a. providing at least one solvent;

b. providing at least one Cu salt;

c. providing at least one Ca salt;

d. providing at least one complexing agent; and

e. providing at least one reducing agent, (b) through (e) being dissolved in (a).

4. A method, as recited in claim 3, wherein the step of utilizing the electroless plating treatment further comprises using the electroless plating solution further comprising:

f. providing at least one pH adjuster; and

g. providing at least one surfactant, (f) and (g) being dissolved in (a).

5. A method, as recited in claim 1, wherein the Cu—

Ca—

X film forming step comprises forming the at least one contaminant being selected from a group consisting of carbon C), sulphur (S), and oxygen (O).

6. A method, as recited in claim 1, wherein the contaminant-reduced Cu—

Ca film forming step comprises forming a Cu—

rich film and comprises forming to a Ca-doping level in a range of 0.2 atomic % to 5 atomic %.

7. A method, as recited in claim 1, wherein the contaminant-reduced Cu—

Ca film forming step comprises forming a Cu-rich film and comprises forming to a thickness in a range of 15 Å

to 150 Å

.

8. A method, as recited in claim 1, wherein the Cu film forming step comprises forming the Cu film to a thickness in a range of 0.3 μ

m to 0.7 μ

m.

9. A method, as recited in claim 1, wherein the Cu film forming step comprises forming the Cu film to a low resistivity in a range of 1.67 μ

Ω

.cm to 1.8 μ

Ω

.cm.

10. A method of fabricating a semiconductor device, having a contaminant-reduced Cu—

Ca/Cu interconnect structure, comprising;

providing a semiconductor substrate;

forming a Cu film on the semiconductor substrate; and

forming a contaminant-reduced Cu—

Ca film on the Cu film, said contaminant-reduced Cu—

Ca film forming step comprises;

utilizing an electroless plating treatment, using an electroless plating solution, for facilitating doping the Cu film with at least one plurality of ions selected from a group consisting of Cu ions and Ca ions and for facilitating forming a Cu—

Ca—

X film on the Cu film, X denoting at least one contaminant, and

utilizing an annealing treatment for facilitating forming the contaminant-reduced Cu—

Ca film on the Cu film and for facilitating forming the contaminant-reduced Cu—

Ca/Cu interconnect structure, on the semiconductor device, the contaminant-reduced Cu—

Ca interconnect structure comprising the contaminant-reduced Cu—

Ca film,

wherein the Cu film forming step comprises utilizing a technique selected from a group consisting of electroplating, electroless plating, chemical vapor deposition (CVD), plasma vapor deposition (PVD), and plasma enhanced chemical vapor deposition PECVD),

wherein the step of utilizing an electroless plating treatment in the electroless plating solution, for facilitating doping of the Cu film with at least one plurality of ions selected from a group consisting of Cu ions and Ca ions, comprises using the electroless plating solution comprising;

(1) providing at least one solvent;

(2) providing at least one Cu salt;

(3) providing at least one Ca salt;

(4) providing at least one complexing agent;

(5) providing at least one reducing agent;

(6) providing at least one pH adjuster; and

(7) providing at least one surfactant,

(2) through (7) being dissolved in (1), and for facilitating depositing a Cu—

Ca—

X film on the Cu film, wherein X denotes at least one contaminant selected from a group consisting of C, S, and O,

wherein the annealing treatment, for facilitating forming the contaminant-reduced Cu—

Ca film on the Cu film, comprises utilizing the annealing treatment in a temperature range of 250°

C. to 450°

C. in an environment selected from a group consisting of a vacuum, an inert gas, and a reducing ambient,

wherein the contaminant-reduced Cu—

Ca film forming step comprises forming a Cu-rich film and comprises forming to a Ca-doping level in a range of 0.2 atomic % to 5 atomic %, and for facilitating forming the contaminant-reduced Cu—

Ca/Cu interconnect structure, comprising the contaminant-reduced Cu—

Ca film, on the semiconductor substrate, and

wherein the Cu film forming step comprises forming the Cu film to a thickness in a range of 0.3 μ

m to 0.7 μ

m, and to a low resistivity in a range of 1.67 μ

Ω

.cm to 1.8 μ

Ω

.cm.

11. A method of fabricating a semiconductor device, having a contaminant-reduced Cu—

Ca/Cu interconnect structure, comprising;

providing a semiconductor substrate;

forming a Cu film on the semiconductor substrate; and

forming a contaminant-reduced Cu—

Ca film on the Cu film, said contaminant-reduced Cu—

Ca film forming step comprising;

utilizing an electroless plating treatment, using an electroless plating solution, for facilitating doping the Cu film with at least one plurality of ions selected from a group consisting of Cu ions and Ca ions and for facilitating forming a Cu—

Ca—

X film on the Cu film, X denoting at least one contaminant, and

utilizing an annealing treatment for facilitating forming the contaminant-reduced Cu—

Ca film on the Cu film and for facilitating forming the contaminant-reduced Cu—

Ca/Cu interconnect structure, on the semiconductor device, the contaminant-reduced Cu—

Ca interconnect structure comprising the contaminant-reduced Cu—

Ca film,

wherein the contaminant-reduced Cu—

Ca film forming step comprises forming a Cu-rich film with a thickness of 15 Å

to 150 Å and

forming the Cu-rich film to a Ca-doping level in a range of 0.2 atomic % to 5 atomic %, and

wherein the Cu film forming step comprises forming the Cu film to a thickness in a range of 0.3 μ

m to 0.7 μ

m and to a low resistivity in a range of 1.67 μ

Ω

.cm to 1.8 μ

Ω

.cm.