Semiconductor device and method for manufacturing the same

• US 6,624,477 B1
• Filed: 07/24/1998
• Issued: 09/23/2003
• Est. Priority Date: 10/09/1992
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Konuma, Toshimitsu, Takemura, Yasuhiko, Zhang, Hongyong
• Primary Examiner(s): JACKSON JR, JEROME
• Application Number:
  US09/122,092
• Time in Patent Office: 1,887 Days
• Field of Search: 257/351, 257/69
• US Class Current: 257/351
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

A monolithic circuit comprises a plurality of thin film transistors. Source and drain regions of the TFT are provided with a metal silicide layer having a relatively low resistivity. Thereby, the effective distance between a gate and a source/drain electrode can be reduced.

Claims

1. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix circuit,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions; and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of metal silicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween; and

a second wiring connected to at least one of said pair of metal suicide regions.

2. The active matrix.display device according to claim 1 wherein each of said first and second channel regions has a thickness:

of 50 to 500 Å

.

3. The active matrix display device according to claim 1 wherein said metal silicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.

4. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix region,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions; and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of metal silicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween; and

a second wiring connected to at least one of said pair of metal silicide regions,

wherein a distance between said second channel region and said one of said pair of second impurity regions is less than 1 μ

m.

5. The active matrix display device according to claim 4 wherein each of said first and second channel regions has a thickness of 50 to 500 Å

.

6. The active matrix display device according to claim 4 wherein said metal silicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.

7. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix circuit,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions, and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of metal suicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween; and

a second wiring connected to at least one of said pair of metal silicide regions via a plurality of contact holes.

8. The active matrix display device according to claim 7 wherein each of said first and second channel regions has a thickness of 50 to 500 Å

.

9. The active matrix display device according to claim 7 wherein said metal silicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.

10. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix circuit,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions; and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of metal silicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween; and

a second wiring connected to at least one of said pair of metal silicide regions,

wherein a thickness of said pair of first impurity regions is larger than that of said pair of second impurity regions.

11. The active matrix display device according to claim 10 wherein each of said first and second channel regions has a thickness of 50 to 500 Å

.

12. The active matrix display device according to claim 10 wherein said metal suicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.

13. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix circuit,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions; and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of first metal silicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween;

a third semiconductor film having a pair of third impurity regions and a third channel region interposed therebetween;

a pair of second metal suicide regions formed on said pair of third impurity regions;

a third gate electrode formed adjacent to said third channel region with a third gate insulating film interposed therebetween; and

a second wiring connected to at least one of said pair of first and second metal silicide regions.

14. The active matrix display device according to claim 13 wherein each of said first, second and third channel regions has a thickness of 50 to 500 Å

.

15. The active matrix display device according to claim 13 wherein said metal silicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.

16. An active matrix display device having an active matrix circuit and a driver circuit for driving said active matrix circuit,

said active matrix circuit comprising:

a first semiconductor film having a pair of first impurity regions and a first channel region interposed therebetween;

a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween;

a first wiring connected to one of said pair of first impurity regions; and

a pixel electrode connected to the other one of said pair of first impurity regions,

said driver circuit comprising;

a second semiconductor film having a pair of second impurity regions and a second channel region interposed therebetween;

a pair of first metal silicide regions formed on said pair of second impurity regions;

a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween;

a third semiconductor film having a pair of third impurity regions and a third channel region interposed therebetween;

a pair of second metal suicide regions formed on said pair of third impurity regions;

a third gate electrode formed adjacent to said third channel region with a third gate insulating film interposed therebetween; and

a second wiring connected to both of one of said pair of first silicide regions and one of said pair of second silicide regions via a contact hole.

17. The active matrix display device according to claim 16 wherein each of said first, second and third channel regions has a thickness of 50 to 500 Å

.

18. The active matrix display device according to claim 16 wherein said metal silicide regions comprise at least one metal element selected from the group consisting of Mo, W, Pt, Cr, Ti, and Co.