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Arrangement for a security module

  • US 6,625,741 B1
  • Filed: 03/10/2000
  • Issued: 09/23/2003
  • Est. Priority Date: 03/12/1999
  • Status: Expired due to Fees
First Claim
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1. A security module arrangement for use with a source of operating voltage, comprising:

  • a secured housing;

    a processor in said secured housing;

    a memory in said secured housing accessible by said processor and having memory contents, said memory requiring a minimum voltage at said memory in order to preserve said memory contents;

    a switching circuit in said secured housing having a connection for receiving operating voltage if operating voltage is available;

    externally accessible battery terminals at said secured housing, connected across said switching circuit;

    a battery replaceably and releasably connected to said battery terminals, said switching circuit supplying voltage above said minimum voltage to said memory from said battery if said operating voltage is not available;

    a voltage monitoring circuit connected in said secured housing between said switching circuit and said memory having resettable voltage maintenance, triggered if said voltage from said battery is below a predetermined threshold, to cause said minimum voltage at said memory to be maintained to allow replacement of said battery;

    a reset unit which determines when said voltage from said battery rises above said predetermined threshold, after said voltage from said battery has fallen below said predetermined threshold; and

    said voltage monitoring unit comprising a switch which is caused to change switching state by said resetting unit for resetting said voltage monitoring circuit, a line connection to said switching circuit, and a ground connection, a voltage divider connected between said line connection and said ground connection, said voltage divider having a divider tap, a comparator with an inverting input connected to said tap, and a non-inverting input and an output, a first voltage maintenance circuit also connected to said tap, and a second voltage maintenance circuit connected via an inverter to said output of said comparator, and connected to said memory.

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