Method and apparatus for detecting the type of interface to which a peripheral device is connected

• US 6,625,790 B1
• Filed: 10/01/1999
• Issued: 09/23/2003
• Est. Priority Date: 07/08/1998
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Casebolt, Mark W., Featherston, Lord Nigel
• Primary Examiner(s): Siek, Vuthe
• Assistant Examiner(s): LEVIN, NAUM B
• Application Number:
  US09/409,683
• Time in Patent Office: 1,453 Days
• Field of Search: 716/4, 716/8, 712/1, 712/230, 710/8, 710/26, 710/63, 710/108, 710/262, 710/269, 710/305, 710/306, 379/142.15
• US Class Current: 710/8
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4068 Electrical coupling

Abstract

A peripheral device is connectable to a computer having one of a first interface and a second interface. The first interface communicates with the peripheral device over a differential data connection having a first data conductor and a second data conductor. The second interface communicates with the peripheral device over a clock conductor and a single ended data connection which includes a data conductor. The peripheral device includes an interface detection component coupled to at least one of first and second communication conductors used to communicate between the peripheral device and the computer. The interface detection component is configured to detect which of the first and second interfaces the peripheral device is connected to.

Claims

1. A peripheral device connectable to a computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device comprising:

first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface;

a connection element connecting a predetermined one of the first and second communication conductors to a voltage potential;

an interface detection component, coupled to the first and second communication conductors, configured to detect which of the first and second interfaces the peripheral device is connected to and to provide a connection output indicative of the detected interface; and

a controller component, coupled to the interface detection component, configured to communicate between the peripheral device and the computer over the first and second communication conductors according to a protocol corresponding to the detected interface based on the connection output.

2. The peripheral device of claim 1 wherein the connection element comprises:

a resistive element connected between the predetermined communication conductor and the voltage potential.

3. The peripheral device of claim 2 wherein the resistive element is directly connected to the predetermined communication conductor and the voltage potential.

4. The peripheral device of claim 3 wherein the interface detection component is configured to sense signal levels on the first and second communication conductors and determine that the detected interface is the first interface upon sensing any valid communication corresponding to the first interface.

5. The peripheral device of claim 4 wherein the interface detection component is configured to sense a predetermined signal state on the first and second communication conductors and determine that the detected interface is the second interface.

6. The peripheral device of claim 5 wherein the predetermined signal state comprises a logical high level on the first and second communication conductors lasting for a predetermined time period.

7. The peripheral device of claim 2 wherein the connection element further comprises:

a switchable element selectively connecting the resistive element to the voltage potential.

8. The peripheral device of claim 7 wherein the switchable element comprises:

a bipolar transistor.

9. The peripheral device of claim 7 wherein the interface detection component comprises:

a switch controller, coupled to the switchable element, selectively connecting the resistive element to the voltage element.

10. The peripheral device of claim 9 wherein the switch controller is configured to connect the resistive element to the voltage potential and wherein the interface detection component is configured to sense signal levels on the first and second communication conductors and determine the detected interface based on the sensed signal levels.

11. The peripheral device of claim 10 wherein the interface detection component is configured to sense a first predetermined signal state on the first and second communication conductors and, if the first predetermined signal state lasts for a predetermined time period, connect and disconnect the resistive element to the voltage potential according to a preselected sequence and sense the signal levels during the preselected sequence.

12. The peripheral device of claim 11 wherein the interface detection component is configured to determine that the interface is the first interface if the signal levels, sensed during the preselected sequence, exhibit a first pattern associated with the first interface.

13. The peripheral device of claim 12 wherein the interface detection component is configured to determine that the interface is the second interface if the signal levels, sensed during the preselected sequence, exhibit a second pattern associated with the second interface.

14. The peripheral device of claim 10 wherein the interface detection component is configured to sense a second predetermined signal state, corresponding to the second interface, on the first and second communication conductors and, if the second predetermined signal state lasts for a predetermined time period, determining that the interface is the second interface.

15. The peripheral device of claim 1 and further comprising:

an adapter, disconnectably connected to the first and second communication conductors, including first and second resistive elements connecting the first and second communication conductors, respectively, to the voltage potential.

16. A method implemented by a peripheral device for detecting whether the peripheral device is connected to a first interface or a second interface in a computer, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device including first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface, the method comprising:

sensing signal levels on the first and second communication conductors; and

detecting which of the first and second interfaces the peripheral device is connected to based on the sensed signal levels.

17. The method of claim 16 wherein sensing signal levels comprises:

sensing any valid communication associated with the first interface and wherein detecting comprises detecting the first interface upon sensing the valid communication.

18. The method of claim 16 wherein sensing signal levels comprises:

sensing a predetermined signal state, associated with the second interface, on the first and second communication conductors; and

if so, detecting comprises detecting the second interface.

19. The method of claim 18 wherein sensing a predetermined signal state comprises:

sensing logic high levels on the first and second communication conductors; and

determining whether the predetermined signal state lasts for a predetermined time period.

20. The method of claim 16 wherein sensing comprises:

sensing a predetermined signal state;

determining whether the predetermined signal state lasts for a predetermined time period;

if so, selectively attaching one of the first and second communication conductors to a predetermined voltage potential according to a preselected sequence.

21. The method of claim 20 wherein sensing comprises:

sensing signal levels during the preselected sequence; and

wherein detecting comprises detecting the first interface when the sensed signal levels exhibit a pattern corresponding to the first interface and detecting the second interface when the sensed signal levels exhibit a pattern corresponding to the second interface.

22. The method of claim 20 wherein selectively attaching comprises:

selectively energizing a bipolar transistor connected between one of the first and second communication conductors and the predetermined voltage potential.

23. A method implemented in a peripheral device of detecting whether the peripheral device is connected to a Universal Serial Bus (USB) interface or a PS2 interface, the peripheral device including first and second communication conductors, the method comprising:

sensing signal levels on the first and second communication conductors; and

detecting which of the USB and PS2 interfaces the peripheral device is connected to based on the sensed signal levels.

24. The method of claim 23 wherein sensing signal levels comprises:

sensing any valid USB communication and wherein detecting comprises detecting the USB interface upon sensing the valid communication.

25. The method of claim 23 wherein sensing signal levels comprises:

sensing a predetermined signal state, associated with the PS2 interface, on the first and second communication conductors; and

if so, detecting comprises detecting the PS2 interface.

26. The method of claim 25 wherein sensing a predetermined signal state comprises:

sensing logic high levels on the first and second communication conductors; and

determining whether the predetermined signal state lasts for a predetermined time period.

27. The method of claim 23 wherein sensing comprises:

sensing a predetermined signal state;

determining whether the predetermined signal state lasts for a predetermined time period;

if so, selectively attaching one of the first and second communication conductors to a predetermined voltage potential according to a preselected sequence.

28. The method of claim 27 wherein sensing comprises:

sensing signal levels during the preselected sequence; and

wherein detecting comprises detecting the USB interface when the sensed signal levels exhibit a pattern corresponding to the USB interface and detecting the PS2 interface when the sensed signal levels exhibit a pattern corresponding to the PS2 interface.

29. The method of claim 27 wherein selectively attaching comprises:

selectively energizing a bipolar transistor connected between one of the first and second communication conductors and the predetermined voltage potential.

30. A peripheral device connectable to a computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device comprising:

first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface;

an interface detection component, coupled to at least one of the first and second communication conductors, configured to monitor at least one of the first and second communication conductors to detect which of the first and second interfaces the peripheral device is connected to; and

a controller component, coupled to the interface detection component, configured to communicate between the peripheral device and the computer over the first and second communication conductors according to a protocol corresponding to the detected interface.

31. A computer readable medium for use in a peripheral device connectable to a computer, the computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device including first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface, the computer readable medium including instructions stored thereon which when executed by the peripheral device causes the peripheral device to execute the steps of:

detecting which of the first and second interfaces the peripheral device is connected to based on signal levels on at least one of the first and second communication conductors; and

communicating with the computer over the first and second communication conductors according to a protocol corresponding to the detected interface.

32. A peripheral device connectable to a computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device comprising:

first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the clock conductor and the first data conductor in the single ended data connection when the computer includes the second interface;

an interface detection component, coupled to at least one of the first and second communication conductors, configured to detect which of the first and second interfaces the peripheral device is connected to by detecting a signal level on at least one of the first and second communication conductors and to provide a connection output indicative of the detected interface; and

a controller component, coupled to the interface detection component, configured to communicate between the peripheral device and the computer over the first and second communication conductors according to a protocol corresponding to the detected interface based on the connection output.

33. A computer readable medium for use in a peripheral device connectable to a computer, the computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device including first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the clock conductor and the first data conductor in the single ended data connection when the computer includes the second interface, the computer readable medium including instructions stored thereon which when executed by the peripheral device causes the peripheral device to execute the steps of:

detecting which of the first and second interfaces the peripheral device is connected to by monitoring a state of at least one of the first and second communication conductors; and

communicating with the computer over the first and second communication conductors according to a protocol corresponding to the detected interface.