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High linearity, low offset interface for hall effect devices

  • US 6,628,114 B2
  • Filed: 09/06/2002
  • Issued: 09/30/2003
  • Est. Priority Date: 10/08/1998
  • Status: Expired due to Term
First Claim
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1. A Hall effect sensor with improved output interface for high linearity and low offset performance, as associated with a given line voltage, comprising:

  • a Hall effect device characterized by first and second opposing surfaces and formed with first and second device inputs and first and second device outputs;

    a substrate layered adjacent to a selected one of said first and second opposing surfaces of said Hall effect device to form a capacitively coupled relationship between said substrate and the Hall effect device layers at the surface opposing said substrate, to reduce the potential for charge trapping during operation of said Hall effect sensor;

    an electrical connection between said substrate and one of said first and second device outputs, said electrical connection forming in part a biasing circuit for eliminating undesirable offset effects due to non-symmetries in the Hall effect device and for eliminating common mode voltages, wherein the device output to which said substrate is connected is provided at a virtual ground potential; and

    a biasing current supplied to said Hall effect device proportional to the line voltage with which said device and interface are associated.

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