Method of arrangement to determine a clock timing error in a multi-carrier transmission system, and a related synchronization units
First Claim
Patent Images
1. A method to determine during a tracking mode in a multi-carrier system a clock timing error (τ
-
e) used for synchronisation purposes, said method comprising the steps of;
detecting phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) for a plurality of pilot carriers, and calculating said clock timing error (τ
e) from said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1), wherein a share (Ai) of a phase error (φ
i), of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) in said clock timing error (τ
e) depends on a value (SNRi) of a transmission quality parameter measured for a pilot carrier of said pilot carriers for whom said phase error (φ
i) is measured, further comprising the step of calculating said clock timing error (τ
e) as a weighted sum of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) whereby said share (Ai) of said phase error (φ
i) equals a weight coefficient in said sum, wherein said share (Ai) is linearly proportional to said value (SNRi) of said transmission quality parameter.
10 Assignments
0 Petitions
Accused Products
Abstract
In a multi-carrier transmission system, a clock timing error (τe) is calculated at the receiver'"'"'s side and used for synchronization between a transmitting modem and a receiving modem (RX1). The clock timing error (τe) is calculated from phase errors (φ0, φ1, . . . , φi, . . . , φN-1) detected for a plurality of pilot carriers during a tracking mode in such a way that the share (Ai) of a phase error (φi) detected for a particular pilot carrier in the clock timing error (τe) depends on the transmission quality (SNRi) of that pilot carrier over the transmission medium in between the two modems. In this way, the robustness of the synchronization for narrowband noise near a pilot carrier is improved significantly.
79 Citations
7 Claims
-
1. A method to determine during a tracking mode in a multi-carrier system a clock timing error (τ
-
e) used for synchronisation purposes, said method comprising the steps of;
detecting phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) for a plurality of pilot carriers, andcalculating said clock timing error (τ
e) from said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1), wherein a share (Ai) of a phase error (φ
i), of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) in said clock timing error (τ
e) depends on a value (SNRi) of a transmission quality parameter measured for a pilot carrier of said pilot carriers for whom said phase error (φ
i) is measured,further comprising the step of calculating said clock timing error (τ
e) as a weighted sum of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) whereby said share (Ai) of said phase error (φ
i) equals a weight coefficient in said sum,wherein said share (Ai) is linearly proportional to said value (SNRi) of said transmission quality parameter. - View Dependent Claims (2, 3, 4)
-
e) used for synchronisation purposes, said method comprising the steps of;
-
5. A synchronisation unit (SYNCHRO1) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO1) comprising:
-
a. skip and duplicate means (S/D), adapted to remove a sample from or to duplicate a sample in a multi-carrier signal when a clock timing error (τ
e) becomes larger than or equal to a sample period;
b. phase rotation means (ROTOR), coupled in series with said skip and duplicate means (S/D), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to said clock timing error (τ
e) and proportional to a frequency of said carrier;
c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ
e), said clock timing error determination arrangement (ARR) comprising;
c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) for a plurality of pilot carriers; and
c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ
e) from said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1); and
d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to inputs of both said skip and duplicate means (S/D) and said phase rotation means (ROTOR), said feedback loop (FBL) being adapted to feed back said clock timing error (τ
e) to both said, skip and duplicate means (S/D) and said phase rotation means (ROTOR),CHARACTERISED IN THAT said clock timing error determination arrangement ARR) further comprises;
c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNRi) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A0, A1, . . . , Ai, . . . , AN-1) of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1), in said clock timing error (τ
e) from said values (SNRi) of said transmission quality parameter; and
further in that;
c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A0, A1, . . . , Ai, . . . , AN-1) and to calculate said clock timing error (τ
e) from said shares (A0, A1, . . . , Ai, . . . , AN-1) and said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1).
-
-
6. A synchronisation unit (SYNCHRO2) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO2) comprising:
-
a. sampling means (A/D) under control of a voltage controlled oscillator (VCXO), adapted to sample a multi-carrier signal, a period of said voltage controlled oscillator (VCXO) being controlled by a clock timing error (τ
e);
b. phase rotation means (ROTOR), coupled in series with said sampling means (A/D), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to a frequency of said carrier;
c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ
e), said clock timing error determination arrangement (ARR) comprising;
c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) for a plurality of pilot carriers; and
c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ
e) from said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1); and
d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to an input of said voltage controlled oscillator (VCXO), said feedback loop (FBL) being adapted to feed back said clock timing error (τ
e) to said voltage controlled oscillator (VCXO),CHARACTERISED IN THAT said clock timing error determination arrangement (ARR) further comprises;
c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNRi) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A0, A1, . . . , Ai, . . . , AN-1) of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) in said clock timing error (τ
e) from said value (SNRi) of said transmission quality parameters; and
further in that;
c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A0, A1, . . . , Ai, . . . , AN-1) and to calculate said clock timing error (τ
e) from said shares (A0, A1, . . . , Ai, . . . , AN-1) and said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1).
-
-
7. A synchronisation unit (SYNCHRO3) to be used in a multi-carrier system, said synchronisation unit (SYNCHRO3) comprising:
-
a. interpolator means (INT), adapted to receive a multi-carrier input signal and to interpolate in between two successive samples of said multi-carrier input signal to generate an intermediate sample;
b. phase rotation means (ROTOR), coupled in series with said interpolator means (INT), and adapted to apply a phase shift to each carrier in said multi-carrier signal proportional to a frequency of said carrier;
c. a clock timing error determination arrangement (ARR), coupled to said phase rotation means (ROTOR), and adapted to determine during a tracking mode of said multi-carrier system said clock timing error (τ
e), said clock timing error determination arrangement (ARR) comprising;
c1. phase error detection means (PHASE) whereto a multi-carrier signal is applied, said phase error detection means (PHASE) being adapted to detect phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) for a plurality of pilot carriers; and
c2. calculation means (CALC), coupled to said phase error detection means (PHASE), and adapted to calculate said clock timing error (τ
e) from said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1); and
d. a feedback loop (FBL) coupled to said clock timing error determination arrangement (ARR) and having an output coupled to an input of a serial-to-parallel converter (S/P) via said interpolator means (INT), said feedback loop (FBL) being adapted to feed back said clock timing error (τ
e) to said interpolator (INT);
CHARACTERISED IN THAT said clock timing error determination arrangement (ARR) further comprises;
c3. share determination means (WEIGHT), having an output coupled to said calculation means (CALC) and being adapted to receive via an input thereof values (SNRi) of a transmission quality parameter related to said plurality of pilot tones and to determine shares (A0, A1, . . . , Ai, . . . , AN-1) of said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1) in said clock timing error (τ
e) from said values (SNRi) of said transmission quality parameter; and
further in that;
c4. said calculation means (CALC) is adapted to receive via an input thereof said shares (A0, A1, . . . , Ai, . . . , AN-1) and to calculate said clock timing error (τ
e) from said shares (A0, A1, . . . , Ai, . . . , AN-1) and said phase errors (φ
0, φ
1, . . . , φ
i, . . . , φ
N-1).
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeRPX Corporation
-
Original AssigneeAlcatel SA (Nokia Corporation)
-
InventorsPollet, Thierry, Peeters, Miguel
-
Primary Examiner(s)Ghayour, Mohammad H.
-
Assistant Examiner(s)AL BESHRAWI, TONY
-
Application NumberUS09/158,596Time in Patent Office1,834 DaysField of Search375/371, 375/226, 375/355US Class Current375/371CPC Class CodesH04L 27/2657 Carrier synchronisationH04L 27/2662 Symbol synchronisationH04L 27/2675 Pilot or known symbols
