Controller for ATAPI mode operation and ATAPI driven universal serial bus mode operation and methods for making the same

• US 6,633,933 B1
• Filed: 09/30/1999
• Issued: 10/14/2003
• Est. Priority Date: 09/30/1999
• Status: Expired due to Term

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: Oak Technology Partners (Qualcomm, Inc.)
• Inventors: Smith, Don, MacLean, Neil H., Ling, Ka Kit, Ng, Alan K.
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): Nguyen, Tanh Q.
• Application Number:
  US09/410,172
• Time in Patent Office: 1,475 Days
• Field of Search: 710/2, 710/8, 710/11, 710/14, 710/36, 710/37, 710/38, 710/62-65, 710/71, 710/72, 710/74, 710/104, 710/105, 710/107, 710/129, 348/222, 348/232
• US Class Current: 710/74
• CPC Class Codes: G06F 3/0607 by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0661 Format or protocol conversion arrangements
• CPC Class Codes: G06F 3/0677 Optical disk device, e.g. CD-ROM, DVD

Abstract

A controller for use in an optical storage device is provided. The controller includes a block decoder/encoder for processing data to and from a media of the optical storage device. An ATAPI interface is also provided and is configured to process data and control signals for selectively communicating data to and from the optical storage device during operation in an ATAPI mode. Universal serial bus (USB) logic is configured to process data and control signals for selectively communicating data to and from the optical storage device during operation in a USB mode. The USB logic is configured to utilize data transfer control logic implemented by the ATAPI interface. Accordingly, the one controller can be integrated into either an external peripheral device that communicates over a USB connection in the USB mode, or into an internal peripheral device that communicates over an IDE connection in the ATAPI mode. The optical storage device can be any type of optical storage device, such as, for example a CD-RW, a CD-ROM, a CD-R, a DVD, and the like. Further, the optical storage device can be in the form of an internal or external peripheral device.

Claims

1. A controller for use in a mass storage peripheral device comprising:

a block decoder/encoder for processing data to and from a media of the mass storage peripheral device;

an interface configured to process data and control signals for selectively communicating data to and from the mass storage peripheral device during operation in a first mode, the interface being shared to process data and control signals in other than the first mode; and

logic configured to process data and control signals for selectively communicating data to and from the mass storage peripheral device during operation in a second mode, the logic for operation in the second mode borrowing data transfer control logic of the interface when exclusively operating in the second mode

wherein the logic is universal serial bus (USB) logic and the interface is an ATAPI interface and the USB logic further includes,

a USB pad cell that provides connection to and from a USB cable and the ATAPI interface; and

USB core logic in communication with the USB pad cell, the ATAPI interface, and a microprocessor interface, the USB core logic including,

a smart FIFO for coordinating USB data transfers to and from the mass storage peripheral device;

an I/O select that is placed into either the ATAPI mode or the USB mode;

an application unit having a plurality of registers at least one register being an enable register for setting the I/O select; and

a USB device controller for performing packetizing and de-packetizing of data being transferred in the USB mode.

2. A controller for use in a mass storage peripheral device as recited in claim 1, wherein the smart FIFO includes,

storage;

a retry control; and

a sequencer.

3. A controller for use in a mass storage peripheral device as recited in claim 2, wherein the storage is a 64×

8 bit memory device.

4. A controller for use in a mass storage peripheral device as recited in claim 2, wherein the retry control includes pointer logic and counters for accessing the storage.

5. A controller for use in a mass storage peripheral device as recited in claim 1, further comprising:

a USB data bus is linked with the smart FIFO, and the smart FIFO is linked with the ATAPI interface.

6. A controller for use in a mass storage peripheral device as recited in claim 5, wherein the USB data bus is an 8 bit bus, which is a subset of an ATAPI data bus that is connected to the ATAPI interface.

7. A controller for use in a mass storage peripheral device comprising:

a block decoder/encoder for processing data to and from a media of the mass storage peripheral device;

an interface configured to process data and control signals for selectively communicating data to and from the mass storage peripheral device during operation in a first mode, the interface being shared to process data and control signals in other than the first mode, and

logic configured to process data and control signals for selectively communicating data to and from the mass storage peripheral device during operation in a second mode, the logic for operation in the second mode borrowing data transfer control logic of the interface when exclusively operating in the second mode;

wherein the logic is universal serial bus. (USB) logic and the interface is an ATAPI interface and the data transfer control logic utilized by the USB logic and implemented by the ATAPI interface includes signals HA2, HA1, HA0, DMACK#, HRD#, HWR#, HRST#, ARST#, CS3FX#, and CS1FX#.

8. A controller for use in a mass storage peripheral device as recited in claim 7, wherein HA0 becomes a 48 MHz clock signal when in the USB mode.

9. A method for making a controller for use in a peripheral device, the controller being capable for operating the peripheral device in one of a first mode and a second mode, comprising;

integrating a first interface to the controller, the first interface being configured to control data transfers to and from the peripheral device in the first mode and enable processing of data transfers to and from the peripheral device in other than the first mode; and

integrating a logic block to the controller, the logic block being configured to facilitate data transfers to and from the peripheral device in the second mode, the logic block being configured to use data transfer control from the first interface to complete the data transfers in the second mode when exclusively operating in the second mode, wherein the first mode is an ATAPI mode and the second mode is a USB mode, and the first interface is an ATAPI interface and the logic block is a USB logic block, and the integrating of the USB logic block further includes.

integrating a USB pad cell to the USB logic block, the USB pad cell providing connection to a USB cable and to the ATAIP interface, and

integrating a USB core logic to the USB logic block, the USB core logic is configured to control data transfers in the USB mode, and the USB core logic is configured to interface with a microprocessor interface, the integrating of the USB core logic further includes.

integrating a smart FIFO to the USB core logic;

integrating an I/O select to the USB core logic;

integrating an application block to the USB core logic; and

integrating a USB device controller to the USB core logic.

10. A method for making a controller for use in a peripheral device as recited in claim 9, wherein the integrating of the smart FIFO further comprises:

integrating a storage device to the smart FIFO;

integrating a retry control to the smart FIFO; and

integrating a sequencer to the smart FIFO.

11. A method for making a controller for use in a peripheral device as recited in claim 9, wherein the peripheral device is a CD-RW device.

12. A controller for use in a compact disc rewritable (CD-RW) peripheral device, comprising:

a block decoder/encoder for processing data to and from a media of the CD-RW peripheral device;

an ATAPI interface configured to process data and control signals for selectively communicating data to and from the CD-RW peripheral device during operation in an ATAPI mode; and

universal serial bus (USB) logic configured to process data and control signals for selectively communicating data to and from the CD-RW peripheral device during operation in a USB mode, the USB logic is configured to utilize data transfer control logic that is part of the ATAPI interface, the USB logic includes,

a USB pad cell that provides connection to and from a USB cable and the ATAPI interface; and

USB core logic in communication with the USB pad cell, the ATAPI interface, and a microprocessor interface;

the USB core logic includes,

a smart FIFO for coordinating USB data transfers to and from the CD-RW peripheral device;

an I/O select that is placed into either the ATAPI mode or the USB mode;

an application unit having a plurality of registers, at least one register being an enable register for setting the I/O select, and

a USB device controller for performing serializing and de-serializing of data being transferred in the USB mode.

13. A controller for use in a compact disc rewritable (CD-RW) peripheral device as recited in claim 12, wherein the smart FIFO includes,

storage;

a retry control; and

a sequencer.

14. A controller for use in a compact disc rewritable (CD-RW) peripheral device as recited in claim 13, wherein the storage is a 64×

8 bit memory device.

15. A controller for use in a compact disc rewritable (CD-RW) peripheral device as recited in claim 14, wherein the retry control includes pointer logic and counters for accessing the storage.

16. A controller for use in an optical storage device, comprising:

a block decoder/encoder for processing data to and from a media of the optical storage device;

an ATAPI interface configured to process data and control signals for selectively communicating data to and from the optical storage device during operation in an ATAPI mode, the ATAPI interface being shared to process data and control signals in other than the ATAPI mode; and

universal serial bus (USB) logic configured to process data and control signals for selectively communicating data to and from the optical storage device during operation in a USB mode, the USB logic for operation in the USB mode borrowing data transfer control logic of the ATAPI interface when exclusively operating in the USB mode, wherein the USB logic includes,

a USB pad cell that provides connection to and from a USB cable and the ATAPI interface; and

USB core logic in communication with the USB pad cell, the ATAPI interface, and a microprocessor interface, and the USB core logic includes,

a smart FIFO for coordinating USB data transfers to and from the optical storage device;

an I/O select that is placed into either the ATAPI mode or the USB mode;

an application unit having a plurality of registers, at least one register being an enable register for setting the I/O select; and

a USB device controller for performing serializing and de-serializing of data being transferred in the USB mode.

17. A controller for use in an optical storage device as recited in claim 16, wherein the smart FIFO includes, storage;

a retry control; and

a sequencer.

18. A controller for use in an optical storage device as recited in claim 17, wherein the storage is a 64×

8 bit memory device.

19. A controller for use in an optical storage device as recited in claim 17, wherein the retry control includes pointer logic and counters for accessing the storage.

20. A controller for use in an optical storage device as recited in claim 16, wherein the optical storage device is one of a CD-ROM, a CD-R, a CD-RW, a DVD.

21. A controller for use in an optical storage device as recited in claim 16, wherein the optical storage device is one of an internal peripheral device and an external peripheral device.