Methods of forming semiconductor constructions

• US 6,635,552 B1
• Filed: 06/12/2000
• Issued: 10/21/2003
• Est. Priority Date: 06/12/2000
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Gonzalez, Fernando
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Le, Thao P
• Application Number:
  US09/592,604
• Time in Patent Office: 1,226 Days
• Field of Search: 438/455, 438/456, 438/458, 438/459
• US Class Current: 438/455
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout

Abstract

The invention includes a method of forming a semiconductor construction. A first substrate is provided which comprises silicon-containing structures separated from one another by an insulative material. The silicon-containing structures define an upper surface. A second semiconductor substrate is provided which comprises a monocrystalline material having a damage region therein. The second semiconductor substrate is bonded to the silicon-containing structures of the first substrate at the upper surface. The monocrystalline material is then cleaved along the damage region. The invention also encompasses a semiconductor construction comprising a first substrate having silicon-containing structures separated from one another by an insulative material, and a second substrate comprising a monocrystalline material. The silicon-containing structures of the first substrate define an upper surface, and the monocrystalline material of the second substrate is bonded over the silicon-containing structures at the upper surface.

Claims

1. A method of forming a semiconductor construction, comprising:

forming a first substrate comprising silicon-containing structures separated from one another by an insulative material;

the silicon-containing structures defining an upper surface;

forming a second semiconductor substrate comprising a monocrystalline material having a damage region therein;

bonding the second semiconductor substrate to the silicon-containing structures at the upper surface; and

cleaving the monocrystalline material along the damage region.

2. The method of claim 1 wherein the cleaving leaves a rough upper surface of the monocrystalline material over the silicon-containing structures;

and further comprising, after the cleaving, smoothing the upper surface of the monocrystalline material.

3. The method of claim 1 wherein the silicon-containing structures comprise conductively-doped silicon.

4. The method of claim 1 wherein the silicon-containing structures comprise amorphous silicon.

5. The method of claim 1 wherein the silicon-containing structures comprise polycrystalline silicon.

6. The method of claim 1 wherein the silicon-containing structures comprise monocrystalline silicon.

7. A method of forming a semiconductor construction, comprising:

forming a first semiconductor substrate comprising a first monocrystalline base and silicon-containing structures above the base, at least some of the silicon-containing structures being separated from one another by an insulative material;

the silicon-containing structures and insulative material together defining a planarized upper surface above the first monocrystalline base;

forming a second semiconductor substrate comprising a second monocrystalline base and having a damage region formed within the second monocrystalline base;

bonding the second semiconductor substrate to the silicon-containing structures at the planarized upper surface above the first monocrystalline base; and

cleaving the second monocrystalline base along the damage region.

8. The method of claim 7 the first and second monocrystalline bases comprise monocrystalline silicon.

9. The method of claim 7 wherein some of the silicon-containing structures have no function except to bond to the second semiconductor substrate;

and wherein others of the silicon-containing structures have additional functions besides bonding to the second semiconductor substrate.

10. The method of claim 7 wherein the second monocrystalline base is bonded to the silicon-containing structures.

11. The method of claim 7 wherein the bonding the second semiconductor structure comprises bonding the second monocrystalline base to the silicon-containing structures, and bonding the second monocrystalline base to the insulative material at the planarized upper surface above the first monocrystalline base.

12. The method of claim 7 wherein the damage region is formed by implanting hydrogen ions into the second monocrystalline base.

13. The method of claim 7 wherein the damage region is formed by implanting hydrogen ions into the second monocrystalline base, and wherein the cleaving comprise thermally treating the second monocrystalline base.

14. The method of claim 7 wherein the only temperatures utilized for the bonding are less than or equal to about 700°

C., and further comprising not exposing the first monocrystalline base to temperatures exceeding 700°

C. after the bonding.

15. The method of claim 7 further comprising forming at least one doped silicon region extending through the second monocrystalline base and electrically contacting at least one of the silicon-containing structures.

16. The method of claim 7 further comprising:

forming at least one doped silicon region extending through the second monocrystalline base and electrically contacting at least one of the silicon-containing structures; and

forming at least one other doped silicon region within the second monocrystalline base, but which does not extend entirely through the second monocrystalline base.