Symmetric inducting device for an integrated circuit having a ground shield

• US 6,635,949 B2
• Filed: 01/04/2002
• Issued: 10/21/2003
• Est. Priority Date: 01/04/2002
• Status: Expired due to Term

• Current Assignee: Tyche Licensing LLC (Quest Patent Research Corporation)
• Original Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Inventors: Young, William R., Lowther, Rex Everett
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): TRAN, MAI HUONG C
• Application Number:
  US10/039,200
• Publication Number:
  US 20030127686A1
• Time in Patent Office: 655 Days
• Field of Search: 257/277, 257/351, 257/495, 257/528, 257/531, 336/223
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 27/36 Electric or magnetic shields or screens movable for varying inductance H01F21/10
• CPC Class Codes: H01F 27/363 made of electrically conductive material
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Claims

1. A symmetric inducting device for an integrated circuit comprising:

a substrate, the substrate having a working surface and a second surface that is opposite the working surface;

a main metal layer, the main metal layer having at least one pair of current path regions, each of the current path region pairs is formed in generally a regular polygonal shape, each current path region pair is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate such that each current path region pair has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry; and

a shield positioned between the second surface of the substrate and the main metal layer, the shield is patterned into segments, the segments of shield are generally symmetric about the plane of symmetry, medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry, the shield is more conductive than regions directly adjacent the shield.

2. The symmetric inducting device for an integrated circuit of claim 1, wherein some of the segments of shield have end portions that extend at predetermined angles from medial portions of the segments of shield.

3. The symmetric inducting device for an integrated circuit of claim 1, wherein the shield is a doped conductive layer in the substrate.

4. The symmetric inducting device for an integrated circuit of claim 1, wherein the shield is a conductive layer of material formed on the working surface of the substrate.

5. The symmetric inducting device for an integrated circuit of claim 1, further comprising:

a dielectric layer formed between the main metal layer and the working surface of the substrate, wherein the shield is formed in the dielectric layer.

6. The symmetric inducting device for an integrated circuit of claim 1, further comprising:

at least one current router to couple select current path regions together, each current router having at least one overpass and at least one underpass.

7. The symmetric inducting device for an integrated circuit of claim 6, wherein the width of the overpass of the at least one current router is narrower than an underpass of the at least one current router.

8. The symmetric inducting device for an integrated circuit of claim 6, wherein the width of the overpass of the at least one current router is wider than an underpass of the at least one current router.

9. The symmetric inducting device for an integrated circuit of claim 6, wherein the width of the overpass of the at least one current router is approximately equal to the width of an underpass of the at least one current router.

10. The symmetric inducting device for an integrated circuit of claim 1, further comprising:

a first lead coupled to a select current path region on a first side of the plane of symmetry; and

a second lead couple to a select current path region on a second side of the plane of symmetry, wherein the first lead is generally symmetric to the second lead about the plane of symmetry.

11. The symmetric inducting device for an integrated circuit of claim 10, further comprising:

a third lead coupled to a select current path region on a first side of the plane of symmetry; and

a fourth lead coupled to a select current path region on a second side of the plane of symmetry, wherein the third lead is generally symmetric to the fourth lead about the plane of symmetry.

12. The symmetric inducting device for an integrated circuit of claim 1, further comprising:

a plurality of conductive straps, each conductive strap coupled to a selected segment of shield to provide an alternative path of reduced resistance for the associated segment of shield.

13. The symmetric inducting device for an integrated circuit of claim 12, wherein each conductive strap is coupled to a portion of a select section of shield that is not positioned between a current path region and the second surface of the substrate.

14. The symmetric inducting device for an integrated circuit of claim 12, wherein at least one of the conductive straps is coupled to a portion of an associated segment of shield that is positioned between a current path region and the second surface of the substrate, further wherein the segment of shield that the at least one of the conductive straps is coupled to is close to AC ground.

15. The symmetric inducting device for an integrated circuit of claim 1, further comprising:

a conductive path positioned along the plane of symmetry, the conductive path is coupled to at least most of the segments of the shield along the plane of symmetry.

16. The symmetric inducting device for an integrated circuit of claim 15, wherein the conductive path is further coupled to an external AC ground.

17. The symmetric inducting device for an integrated circuit of claim 15, further comprising:

a center-tap coupled to a select current path region pair at the plane of symmetry, the center-tap is further coupled to the conductive path.

18. A symmetric inducting device for an integrated circuit comprising:

a substrate, the substrate having a working surface and a second surface that is opposite the working surface;

a main metal layer, the main metal layer having at least one pair of current path regions, each of the current path region pairs is formed in generally a regular polygonal shape, each current path region pair is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate such that each current path region pair has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry; and

a shield positioned between the second surface of the substrate and the main metal layer, the shield is patterned into segments, the segments of shield are generally symmetric about the plane of symmetry, medial portions of most segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry, the shield is more conductive than regions directly adjacent the shield.

19. The symmetric inducting device for an integrated circuit of claim 18, wherein some of the segments of shield have end portions that extend at predetermined angles from medial portions of the segments of shield.

20. The symmetric inducting device for an integrated circuit of claim 18, wherein the shield is a doped conductive layer in the substrate.

21. The symmetric inducting device for an integrated circuit of claim 18, further comprising:

at least one current router to electrically connect select current path regions together, each current router having at least one overpass and at least one underpass.

22. The symmetric inducting device for an integrated circuit of claim 21, wherein the width of the overpass of the at least one current router is narrower than an underpass of the at least one current router.

23. The symmetric inducting device for an integrated circuit of claim 21, wherein the width of the overpass of the at least one current router is wider than an underpass of the at least one current router.

24. The symmetric inducting device for an integrated circuit of claim 21, wherein the width of the overpass of the at least one current router is approximately equal to the width of an underpass of the at least one current router.

25. The symmetric inducting device for an integrated circuit of claim 18, further comprising:

a conductive path positioned along the plane of symmetry, the conductive path is electrically connected to at least most of the segments of the shield along the plane of symmetry.

26. The symmetric inducting device for an integrated circuit of claim 25, wherein the conductive path is further electrically connected to an external AC ground.

27. The symmetric inducting device for an integrated circuit of claim 18, further comprising:

first and second leads electrically connected to a select pair of current path regions, wherein the first lead is electrically connected to a portion of the current path region on one side of the plane of symmetry and the second lead is electrically connected to a portion of the current path region on the opposite side of the plane of symmetry, wherein the position of the first lead is generally symmetric to the second lead about the plane of symmetry.

28. The symmetric inducting device for an integrated circuit of claim 27, further comprising:

third and fourth leads electrically connected to a select pair of current path regions, wherein the third lead is electrically connected to a portion of the current path region on one side of the plane of symmetry and the fourth lead is coupled to a portion of the current path region on the opposite side of the plane of symmetry, wherein the position of the third lead is generally symmetric to the fourth lead about the plane of symmetry.

29. The symmetric inducting device for an integrated circuit of claim 27, further comprising:

a center tap lead electrically connected to a select pair of current path regions along the plane of symmetry.

30. The symmetric inducting device for an integrated circuit of claim 18, further comprising:

a plurality of conductive straps, each conductive strap electrically connected to a selected segment of shield to provide an alternative path of reduced resistance for the associated segment of shield.

31. The symmetric inducting device for an integrated circuit of claim 30, wherein each conductive strap is electrically connected to a portion of a select section of shield that is not positioned between a current path region and the second surface of the substrate.

32. The symmetric inducting device for an integrated circuit of claim 30, wherein at least one of the conductive straps is electrically connected to a portion of an associated segment of shield that is positioned between a current path region and the second surface of the substrate, further wherein the segment of shield that the at least one of the conductive straps is electrically connected to is essentially at AC ground.

33. A symmetric inducting device for an integrated circuit comprising:

a substrate, the substrate having a working surface;

a first shield, the first shield is patterned into segments, the segments of first shield are generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate, medial portions of at least some segments of the first shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry, the first shield is more conductive than regions directly adjacent the first shield; and

a main metal layer positioned between the working surface of the substrate and the first shield, the main metal layer having at least one pair of current path regions, each of the current path region pairs is formed in generally a regular polygonal shape, each current path region pair is generally symmetric about the plane of symmetry such that each current path region pair has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry.

34. The symmetric inducting device for an integrated circuit of claim 33, wherein some of the segments of first shield have end portions that extend at predetermined angles from medial portions of the segments of first shield.

35. The symmetric inducting device for an integrated circuit of claim 33, further comprising:

a plurality of conductive straps, each conductive strap coupled to a selected segment of first shield to provide an alternative path of reduced resistance for the associated segment of first shield.

36. The symmetric inducting device for an integrated circuit of claim 33, further comprising:

a second shield positioned so that the main metal layer is between the first and second shield, the second shield is patterned into segments, the segments of second shield are generally symmetric about the plane of symmetry, medial portions of at least some segments of the second shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry, the second shield is more conductive than regions directly adjacent the second shield.

37. The symmetric inducting device for an integrated circuit of claim 36, wherein some of the segments of second shield have end portions that extend at predetermined angles from medial portions of the segments of second shield.

38. The symmetric inducting device for an integrated circuit of claim 36, further comprising:

a plurality of conductive straps, each conductive strap coupled to a selected segment of second shield to provide an alternative path of reduced resistance for the associated segment of second shield.

39. The symmetric inducting device for an integrated circuit of claim 33, further comprising:

at least one current router to couple select current path regions together, each current router having at least one overpass and at least one underpass.

40. The symmetric inducting device for an integrated circuit of claim 39, wherein the width of the overpass of the at least one current router is narrower than an underpass of the at least one current router.

41. The symmetric inducting device for an integrated circuit of claim 39, wherein the width of the overpass of the at least one current router is wider than an underpass of the at least one current router.

42. The symmetric inducting device for an integrated circuit of claim 39, wherein the width of the overpass of the at least one current router is approximately equal to the width of an underpass of the at least one current router.

43. A symmetric inducting device for an integrated circuit comprising:

a substrate having a working surface and a second surface opposite the working surface;

a main metal layer positioned a predetermined distance from the working surface of the substrate, the main metal layer having at least one pair of current path regions, each current path region pair is formed in generally a regular polygonal shape, each current path region pair is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate such that each current path region pair has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry; and

at least one current router to selectively route current from one pair of current path regions to another pair of current path regions, each current router having an overpass and an underpass, wherein a width of the overpass is less than a width of the underpass.

44. The symmetric inducting device for an integrated circuit of claim 43, wherein each current router is positioned along the plane of symmetry and is used to direct currents from one current path region pair to another current path region pair.

45. The symmetric inducting device for an integrated circuit of claim 43, wherein the width of the overpass is less than the smallest width of a current path region it is coupled thereto.

46. The symmetric inducting device for an integrated circuit of claim 43, wherein the width of the underpass region is wider than the largest width of a current path region it is coupled thereto.

47. The symmetric inducting device for an integrated circuit of claim 43, further comprising:

a shield layer positioned between the second surface of the substrate and the metal layer, the shield layer being patterned into segments that are symmetric about the plane of symmetry, wherein a portion of some of the segments of shield that cross the plane of symmetry are perpendicular to the plane of symmetry.

48. The symmetric inducting device for an integrated circuit of claim 47 wherein the shield is coupled to an external AC ground along the plane of symmetry.

49. The symmetric inducting device for an integrated circuit of claim 47 further comprising:

one or more capacitor compensation sections for each current router, each capacitor compensation section is electrically connected to a current path region that is electrically connected to an overpass of an associated current router to approximate the parasitic capacitance of the underpass to the shield.

50. The symmetric inducting device for an integrated circuit of claim 49, wherein at least one compensation section is formed using the same metal layer as is used to form the underpass of an associated current router.

51. The inducting device for an integrated circuit of claim 49, wherein at least one compensation section is formed between the main metal layer and an underpass of an associated current router.

52. The inducting device for an integrated circuit of claim 49, wherein at least one compensation section is formed from a first conductive layer that is closer to the shield layer than a second different conductive layer used to form the underpass.

53. An inductor device for an integrated circuit comprising:

a substrate having a working surface and a second surface opposite the working surface;

one or more pairs of current path regions formed in a first metal layer, each pair of current path regions is generally symmetric about a plane of symmetry such that each pair of current path regions has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry, wherein each pair of current path regions are formed in a generally regular polygonal shape;

one or more current routers selectively coupled to route current from current path regions in a pair of current path regions to current path regions in other pairs of current path regions, each current router has an overpass and an underpass; and

a conductive shield layer positioned between the second surface of the substrate and the first metal layer, the shield layer is patterned into segments to decrease image currents, the segments of the shield layer are generally symmetric about the plane of symmetry, wherein a portion of most segments of shield adjacent the plane of symmetry are perpendicular to the plane of symmetry.

54. The inductor device for an integrated circuit of claim 53, further comprising:

a first lead coupled to a select current path region of a pair of current path regions on a first side of the plane of symmetry; and

a second lead coupled to a select current path region of the pair of current path regions on a second side of the plane of symmetry, wherein the first lead and second leads couple an external AC power source to the one or more pairs of current path regions.

55. The inductor device for an integrated circuit of claim 53, wherein the overpass of each the current router is made from the first metal layer and the underpass of the current router is made from a more resistive second layer of metal.

56. The inductor device for an integrated circuit of claim 55, wherein the underpass is wider than the overpass to make the resistance of the underpass substantially equal to the resistance of the overpass.

57. The inductor device for an integrated circuit of claim 55, further comprising:

at least one capacitor compensation region made in the second layer of metal, wherein an underpass is positioned approximate the at least one compensation region, the at least one capacitor compensation region is coupled to a current path region that is coupled to an overpass of an associated current router, wherein the at least one capacitor compensation regions create approximately the same parasitic capacitance as the underpass of an associated current router to the shield layer.

58. The inductor device for an integrated circuit of claim 53, further comprising:

a plurality of conductive straps coupled to selected segments of shield to provide an alternative current path with less resistance than the selected segments of shield the strap is coupled thereto.

59. The inductor device for an integrated circuit of claim 58, wherein each conductive strap further comprises:

a relatively narrow medial region, and

relatively wide end regions, the relatively wide end regions are coupled to an associated segment of shield.

60. The inductor device for an integrated circuit of claim 58, further comprising:

an AC ground line coupled to each segment of shield along the plane of symmetry.

61. The inductor device for an integrated circuit of claim 60, wherein the conductive straps are further coupled to the AC ground line along the plane of symmetry.

62. The inductor device for an integrated circuit of claim 61, further comprising:

a center tap lead coupled to a select pair of current routing regions along the plane of symmetry to provide a contact to an external AC ground.

63. The inductor device for an integrated circuit of claim 62, wherein the AC ground line is coupled to the center tap lead.

64. A symmetric inducting device for an integrated circuit comprising:

a substrate, the substrate having a working surface and a second surface that is opposite the working surface;

a main metal layer, the main metal layer having at least one pair of current path regions, each current path region pair is formed in generally a regular polygonal shape, each current path region pair is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate such that each current path region pair has one current path region on one side of the plane of symmetry and another current path region on the other side of the plane of symmetry;

a shield positioned between the second surface of the substrate and the main metal layer, the shield is patterned into segments, the segments of shield are generally symmetric about the plane of symmetry, the shield is more conductive than regions directly adjacent the shield; and

a conducting halo extending around an outer perimeter of the shield, the halo is further electrically coupled to each section of shield, the halo having at least one gap, the halo is further symmetric about the plane of symmetry, wherein each section of shield is electrically connected to the halo.

65. The symmetric inducting device for an integrated circuit of claim 64, further including:

a center tap lead coupled to a select pair of current routing regions along the plane of symmetry to provide a contact to an external AC ground.

66. The symmetric inducting device for an integrated circuit of claim 64, wherein the halo has 2 sections, each section of the halo is symmetric about the plane of symmetry.

67. The symmetric inducting device for an integrated circuit of claim 64, wherein the halo has a first gap positioned at the plane of symmetry, a second gap positioned on a first side of the plane of symmetry and a third gap positioned on a second side of the plane of symmetry, further wherein the second and third gaps are symmetric with respect to each other about the plane of symmetry.

68. The symmetric inducting device for an integrated circuit of claim 64, wherein the halo has a single gap that is positioned at the plane of symmetry.

69. The symmetric inducting device for an integrated circuit of claim 68, wherein the shield and halo are coupled to an external AC ground along the plane of symmetry.

70. The symmetric inducting device for an integrated circuit of claim 64, further comprising:

current routers having at least one overpass and at least one underpass to selectively couple current path regions to other current pass regions.

71. The symmetric inducting device for an integrated circuit of claim 70, wherein a width of each overpass is narrower than the width of an associated underpass.

72. The symmetric inducting device for an integrated circuit of claim 70, wherein the width of each overpass is wider than the width of an associated underpass.

73. The symmetric inducting device for an integrated circuit of claim 70, wherein the width of the overpass is approximately equal to the width of an associated underpass.

74. An inducting device for an integrated circuit comprising:

a substrate having a working surface and a second surface opposite the working surface;

a main metal layer formed a select distance from the working surface of the substrate, the main metal layer having one or more pairs of current path regions formed therein;

a shield layer positioned between the second surface of the substrate and the main metal layer, the shield layer is more conductive than regions directly adjacent the shield layer;

at least one current router to couple a current path region in one pair of current path regions to a current path region in another pair of current path regions, each current router having an overpass and an underpass; and

one or more capacitor compensation sections for each current router, each capacitor compensation section is electrically connected to a current path region that is coupled to an overpass of an associated current router, wherein each capacitor compensation section approximates parasitic capacitance of an underpass of the associated current router to the shield layer.

75. The inducting device for an integrated circuit of claim 74, wherein each pair of current path regions are generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate such that one current path region of a pair of current path regions is on one side of the plane of symmetry and the other of the current path regions is on the other side of the plane of symmetry.

76. The inducting device for an integrated circuit of claim 74, wherein the shield layer is patterned into segments to decrease image currents, the segments of the shield layer are patterned to be generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate.

77. The inducting device for an integrated circuit of claim 74, wherein at least one capacitor compensation section is formed generally at the same vertical depth as the underpass of the associated current router.