Liquid crystal display

• US 6,636,288 B2
• Filed: 07/10/2001
• Issued: 10/21/2003
• Est. Priority Date: 07/27/2000
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Sang-Soo, Kim, Dong-Gyu, Lee, Sang-Wook
• Primary Examiner(s): Parker, Kenneth
• Assistant Examiner(s): CHUNG, DAVID Y
• Application Number:
  US09/901,127
• Publication Number:
  US 20020012079A1
• Time in Patent Office: 833 Days
• Field of Search: 349/139, 349/143, 349/149, 349/150, 349/151, 349/152, 349/122, 349/153
• US Class Current: 349/139
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line

Abstract

A liquid crystal display includes an insulating substrate, gate and data lines formed on the substrate to define pixel areas, or collectively a display area. Gate signal interconnection wires are formed at a corner portion of the substrate outside the display area to transmit gate electrical signals, and provided with gate signal interconnection lines and first and second gate signal interconnection pads connected to both ends of the gate signal interconnection lines. A gate insulating layer, and a protective layer are further formed on the substrate, and provided with first and second contact holes exposing the first and second gate signal interconnection pads. Gate and data signal transmission films are attached to the substrate, and provided with first and second gate signal leads and first and second gate signal wires. The first and second gate signal leads are connected to the first and second gate signal interconnection pads through the first and second contact holes. The first or the second gate signal lead completely covers the first or the second contact hole at least in the longitudinal direction of the lead.

Claims

1. A liquid crystal display, comprising:

a substrate comprising;

a plurality of gate lines;

a plurality of data lines intersecting said plurality of gate lines to define a plurality of pixel areas;

a gate signal interconnection line assembly including;

a plurality of gate signal interconnection lines;

a plurality of first gate signal interconnection pads, each connected to one end of a corresponding one of the plurality of gate signal interconnection lines; and

a plurality of second gate signal interconnection pads, each connected to the other end of a corresponding one of the plurality of gate signal interconnection lines; and

an insulating layer including;

a plurality of first contact holes exposing the plurality of first gate signal interconnection pad, and

a plurality of second contact holes exposing the plurality of second gate signal interconnection pads;

a gate signal transmission film attached to said substrate, and including;

a gate driving integrated circuit to receive the gate electrical signals and send gate signals to the plurality of gate lines,

a plurality of first gate signal wires, and

a plurality of first gate signal leads connected to the plurality of first gate signal interconnection pads through the plurality of first contact holes; and

a signal transmission film attached to said substrate, and including;

a plurality of second gate signal wires, and

a plurality of second gate signal leads connected to the plurality of second gate signal interconnection pads through the plurality of second contact holes,

wherein each of the first gate signal leads completely covers the corresponding first contact hole at least in a longitudinal direction of the first gate signal lead.

2. The liquid crystal display of claim 1, wherein each of the second gate signal leads completely covers the corresponding second contact hole at least in a longitudinal direction of the second gate signal lead.

3. The liquid crystal display of claim 2, further comprising:

a plurality of pixel electrodes formed on the insulating layer;

a plurality of first subsidiary gate signal interconnection pads formed between the first signal interconnection pad and the first gate signal lead, on the same plane as the plurality of pixel electrodes, and covering the plurality of first contact holes; and

a plurality of second subsidiary gate signal interconnection pads formed between the second signal interconnection pad and the second gate signal lead, on the same plane as the plurality of pixel electrodes, and covering the plurality of second contact holes.

4. The liquid crystal display of claim 1, wherein the insulating layer comprises a gate insulating layer covering the plurality of gate lines, and a protective layer covering the plurality of data lines over the gate insulating layer.

5. The liquid crystal display of claim 1, wherein each of the first gate signal leads completely covers at least one side of the corresponding first contact hole in the longitudinal direction, and each of the second gate signal leads completely covers at least one side of the corresponding second contact hole in the longitudinal direction.

6. The liquid crystal display of claim 4, wherein the gate signal interconnection line assembly is formed on the same plane as the plurality of gate lines, and the plurality of first contact holes and the plurality of second contact holes are formed through the gate insulating layer and the protective layer.

7. The liquid crystal display of claim 4, wherein the gate signal interconnection line assembly is formed on the same plane as the plurality of data lines, and the plurality of first contact holes and the plurality of second contact holes are formed through the protective layer.

8. The liquid crystal display of claim 3, wherein the gate signal interconnection line assembly comprises a plurality of first gate signal interconnection lines formed on the same plane as the plurality of gate lines, and a plurality of second gate signal interconnection lines formed on the same plane as the plurality of data lines.

9. The liquid crystal display of claim 8, wherein the plurality of first gate signal interconnection lines and the plurality of the second gate signal interconnection lines are connected to each other via the plurality of first subsidiary gate signal interconnection pads and the plurality of second subsidiary gate signal interconnection pads.

10. The liquid crystal display of claim 1, wherein the signal transmission film is a data signal transmission film including a data driving integrated circuit to receive data electrical signals and send data signals to the plurality of data lines.

11. The liquid crystal display of claim 10, further comprising a printed circuit board connected to the data signal transmission films to send the gate electrical signals and the data electrical signals to the gate driving integrated circuit and the data driving integrated circuit.

12. A liquid crystal display, comprising:

a substrate having;

a plurality of gate lines;

a plurality of data lines crossing over the gate lines to define pixel areas;

a gate signal interconnection line assembly including;

a plurality of gate signal interconnection lines and

a plurality of first gate signal interconnection pads, each formed at one end of a corresponding one of the plurality of gate interconnection lines; and

a plurality of second gate signal interconnection pads, each formed at the other end of a corresponding one of the plurality of gate interconnection lines; and

an insulating layer including;

a plurality of first contact holes exposing the plurality of first gate signal interconnection pads, and

a plurality of second contact holes exposing the plurality of second gate signal interconnection pads,

wherein the plurality of first gate signal interconnection pads and the plurality of second gate signal interconnection pads are formed on the same plane as the plurality of data lines.

13. The liquid crystal display of claim 12, further comprising a plurality of pixel electrodes formed on the insulating layer at the pixel areas.

14. The liquid crystal display of claim 13, further comprising:

a plurality of first subsidiary gate signal interconnection pads formed between the plurality of first subsidiary gate signal interconnection pads and the plurality of first gate signal leads, on the same plane as the pixel electrodes, and covering the plurality of first contact holes, and

a plurality of second subsidiary gate signal interconnection pads formed between the plurality of second subsidiary gate signal interconnections pads and the plurality of second gate signal leads, on the same plain as the pixel electrodes, and covering the plurality of second contact holes.

15. The liquid crystal display of claim 12, wherein the insulating layer comprising a gate insulating layer covering the plurality of gate lines, and a protective layer covering the plurality of data lines over the gate insulating layer.

16. The liquid crystal display of claim 12, further comprising a gate signal transmission film attached to the substrate, the gate signal transmission film including:

a gate driving integrated circuit to receive gate electrical signals and send gate signals to the plurality of gate lines,

a plurality of first gate signal wires, and

a plurality of first gate signal leads connected to the plurality of first gate signal interconnection pads through the plurality of first contact holes.

17. The liquid crystal display of claim 12, further comprising a data signal transmission film attached to the substrate, the data signal transmission film including:

a data driving integrated circuit to receive data electrical signals and send data signals to the plurality of data lines,

a plurality of second gate signal wires, and

a plurality of second gate signal leads connected to the plurality of second gate signal interconnection pads through the plurality of second contact holes.