Method of forming dielectric films

• US 6,638,876 B2
• Filed: 09/19/2001
• Issued: 10/28/2003
• Est. Priority Date: 09/19/2000
• Status: Expired due to Fees

• Current Assignee: Mattson Technology, Inc. (Beijing Economic & Technology Development Area)
• Original Assignee: Mattson Technology, Inc. (Beijing Economic & Technology Development Area)
• Inventors: Levy, Sagy, Bloom, Robin S., Kepten, Avashai
• Primary Examiner(s): Picardat, Kevin M.
• Application Number:
  US09/957,697
• Publication Number:
  US 20020142624A1
• Time in Patent Office: 769 Days
• Field of Search: 438/769, 438/770, 438/775, 438/776, 438/786, 438/787
• US Class Current: 438/769
• CPC Class Codes: C23C 16/0218 in a reactive atmosphere C23C16/0227 takes precedence
• CPC Class Codes: C23C 16/0272 Deposition of sub-layers, e.g. to promote the adhesion of the main coating
• CPC Class Codes: C23C 16/345 Silicon nitride
• CPC Class Codes: C23C 16/40 Oxides
• CPC Class Codes: C23C 16/405 of refractory metals or yttrium
• CPC Class Codes: C23C 16/52 Controlling or regulating the coating process C23C16/45557, C23C16/279 take precedence
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02189 the material containing zirconium, e.g. ZrO2
• CPC Class Codes: H01L 21/02192 the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/02329 introduction of nitrogen
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/3143 composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 21/31604 : Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence
• CPC Class Codes: H01L 21/31637 : Deposition of Tantalum oxides, e.g. Ta2O5
• CPC Class Codes: H01L 21/31641 : Deposition of Zirconium oxides, e.g. ZrO2
• CPC Class Codes: H01L 21/31645 : Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 21/3185 : of siliconnitrides

Abstract

A method for depositing a high-k dielectric coating onto a substrate, such as a semiconductor wafer, is provided. In one embodiment, the process is directed to forming a nitride layer on a substrate. In an alternative embodiment, the present invention is directed to forming a metal oxide or silicate on a semiconductor wafer. When forming a metal oxide or silicate, a passivation layer is first deposited onto the substrate.

Claims

1. A method for depositing a dielectric coating onto a substrate comprising:

i) providing a system comprising a reactor vessel adapted to contain the substrate and an energy source in communication with said reactor vessel for heating the substrate contained in said vessel; and

ii) forming a film on said substrate, said film being formed according to a method comprising;

a) heating the substrate with said energy source;

b) supplying to said reactor vessel an oxide gas while the substrate is being heated, said oxide gas comprising a compound that contains at least one nitrogen atom such that said oxide gas reacts with said substrate to form an oxynitride layer on said substrate, said formed layer having a thickness of less than 10 angstroms;

c) depositing a nitride layer on said oxynitride layer, said deposition occurring at a temperature less than about 750°

C.;

d) annealing said nitride layer in the presence of a nitridation annealing gas; and

e) annealing said nitride layer in the presence of an oxide annealing gas at a temperature greater than about 770°

C.

2. A method as defined in claim 1, wherein said film has a dielectric constant between about 4 to about 80.

3. A method as defined in claim 1, wherein said nitrogen-containing compound comprises NO.

4. A method as defined in claim 1, wherein said nitride layer is formed by supplying a first gas precursor and a second gas precursor to said reactor vessel, said first gas precursor comprising a compound that contains at least one silicon atom and said second gas precursor comprising a compound that contains at least one nitrogen atom.

5. A method as defined in claim 4, wherein said first gas precursor comprises SiH₄.

6. A method as defined in claim 4, wherein said second gas precursor comprises NH₃.

7. A method as defined in claim 1, wherein the substrate is a semiconductor wafer that comprises silicon.

8. A method as defined in claim 1, wherein said oxynitride layer is formed in an atmosphere having a pressure of less than 50 Torr.

9. A method as defined in claim 1, wherein said nitride layer has a thickness of less than 25 angstroms.

10. A method as defined in claim 1, wherein said nitridation annealing gas is ammonia.

11. A method as defined in claim 1, wherein said oxide annealing gas is N₂O.

12. A method as defined in claim 10, wherein annealing said nitride layer in the presence of said nitridation annealing gas is conducted at a temperature of from about 875°

C. to about 925°

C.

13. A method for depositing a dielectric coating onto a substrate comprising:

heating a semiconductor wafer comprising silicon in the presence of an oxide gas, said oxide gas comprising NO, said oxide gas reacting with said semiconductor wafer to form an oxynitride layer on said wafer, said oxynitride layer being formed at a temperature, at a pressure, and for a time sufficient to form a layer having a thickness of less than about 10 angstroms;

subsequently heating said semiconductor wafer in the presence of a first gas precursor and a second gas precursor to form a nitride layer on said oxynitride layer, said first gas precursor comprising SiH₄, said second gas precursor comprising ammonia, said nitride layer being formed at a temperature of less than about 750°

C., said nitride layer having a thickness of less than about 25 angstroms;

annealing said nitride layer in the presence of ammonia; and

thereafter annealing said nitride layer in the presence of N₂O at a temperature of at least 770°

C.

14. A method as defined in claim 13, wherein said nitride layer is annealed in the presence of said ammonia at a temperature of from about 875°

C. to about 925°

C.

15. A method as defined in claim 13, further comprising the step of depositing a polysilicon layer on top of said nitride layer.

16. A method as defined in claim 13, further comprising the step of incorporating said dielectric coating into a capacitor.

17. A method as defined in claim 13, further comprising the step of incorporating said dielectric coating into a transistor.

18. A method for forming a dielectric coating on a semiconductor wafer comprising:

heating a wafer comprising silica in the presence of a gas containing nitrogen to form a passivation layer on said wafer;

subsequently heating said wafer in the presence of a gas precursor, said gas precursor forming a dielectric layer comprising a metal oxide or a silicate on said wafer, said dielectric layer being formed at a temperature of greater than about 300°

C.; and

annealing said dielectric layer in the presence of an annealing gas, said annealing gas comprising an inert gas and an oxygen containing gas.

19. A method as defined in claim 18, wherein said passivation layer has a thickness of less than about 5 nanometers.

20. A method as defined in claim 18, wherein said gas containing nitrogen that is used to form said passivation layer comprises ammonia.

21. A method as defined in claim 20, wherein said passivation layer is formed in less than about 10 seconds at a temperature of from about 600 to about 900°

C.

22. A method as defined in claim 20, wherein the partial pressure of said ammonia during formation of said passivation layer is less than about 100 Torr.

23. A method as defined in claim 18, wherein said dielectric layer is formed at a temperature of from about 400 to about 800°

C. and wherein, during formation of said passivation layer, said gas precursor has a partial pressure of less than 100 Torr.

24. A method as defined in claim 18, wherein said dielectric layer is annealed at a temperature of from about 400°

C. to about 900°

C.

25. A method as defined in claim 18, wherein said oxygen containing gas present during said annealing step comprises NO, N₂O, O₂, or mixtures thereof.

26. A method as defined in claim 25, wherein said inert gas comprises nitrogen, argon, or mixtures thereof.

27. A method as defined in claim 18, wherein said dielectric layer comprises:

HfO₂, ZrO₂, Al₂O₃, Ta₂O₅, La₂O₅, or their silicates.

28. A dielectric coating on a semiconductor wafer comprising:

a semiconductor wafer comprising silica;

a passivation layer deposited on said semiconductor wafer, said passivation layer formed by reacting ammonia with a surface of said semiconductor wafer;

a dielectric layer formed on said passivation layer, said dielectric layer comprising a metal oxide or a silicate; and

wherein said dielectric layer has been annealed in the presence of an oxygen containing gas.

29. A dielectric coating as defined in claim 28, wherein said passivation layer has a thickness of less than 5 nanometers.

30. A dielectric coating as defined in claim 28, wherein said dielectric layer comprises a material selected from the group consisting of HfO₂, ZrO₂, Al₂O₃, Ta₂O₅, La₂O₅, or their silicates.

31. A dielectric coating as defined in claim 28, wherein said coating as an EOT of less than 1.2 nanometers.

32. A dielectric coating as defined in claim 28, wherein said passivation layer has a thickness of less than 1 nanometer.

33. A dielectric coating as defined in claim 28, wherein said dielectric layer comprises HfO₂.