Low voltage differential signaling systems and methods

• US 6,639,434 B1
• Filed: 10/07/2002
• Issued: 10/28/2003
• Est. Priority Date: 10/07/2002
• Status: Expired due to Term

• Current Assignee: Lattice Semiconductor Corporation
• Original Assignee: Lattice Semiconductor Corporation
• Inventors: Rahman, Arifur
• Primary Examiner(s): TON, MY TRANG
• Application Number:
  US10/266,361
• Time in Patent Office: 386 Days
• Field of Search: 327/99, 327/108, 327/112, 327/309, 327/407, 327/63, 327/65, 327/69, 326/82-87, 326/30, 326/38, 326/62
• US Class Current: 327/108
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission
• CPC Class Codes: H04L 25/028 Arrangements specific to the transmitter end
• CPC Class Codes: H04L 25/45 using electronic distributors

Abstract

A low voltage differential signaling driver is disclosed that is capable of supporting many different LVDS standards or signal level requirements. The low voltage differential signaling driver has a programmable offset voltage and a programmable differential output voltage, which may be programmed independently.

Claims

1. A driver comprising:

a multiplexer adapted to select from a plurality of reference voltages;

an amplifier, coupled to the multiplexer, adapted to receive the reference voltage selected by the multiplexer and set an offset voltage of the driver based on the reference voltage;

a current source circuit, coupled to the amplifier, adapted to provide an output current for the driver;

a plurality of transistors, coupled to the current source circuit and to a data line, adapted to route the output current to produce a positive differential output voltage or a negative differential output voltage based on a data value on the data line; and

a current limiting circuit, coupled to the plurality of transistors, adapted to limit the output current to a value that provides a desired differential output voltage.

2. The driver of claim 1, wherein the driver is coupled through a wire pair to a receiver to form a low voltage differential signaling system, wherein the receiver measures the positive differential output voltage or the negative differential output voltage across a load.

3. The driver of claim 1, further comprising at least one memory cell, coupled to the multiplexer, adapted to control the selection of the reference voltage by the multiplexer.

4. The driver of claim 1, wherein the current source circuit comprises a first, second, and third transistor in parallel, with the first and second transistor controlled by the amplifier.

5. The driver of claim 4, wherein the current source circuit further comprises a pass gate coupled between the first transistor and the second transistor, the pass gate receiving a control signal that determines whether the pass gate couples the second transistor to the amplifier.

6. The driver of claim 5, further comprising a memory cell that provides the control signal to the pass gate.

7. The driver of claim 5, wherein the third transistor during operation is switched on to minimize performance differences associated with the first and second transistor.

8. The driver of claim 1, wherein the current limiting circuit is programmable such that a value of the output current is selectable to provide corresponding values for the differential output voltage.

9. The driver of claim 8, wherein the current limiting circuit comprises:

at least two current paths having transistors that regulate an amount of current flowing through the current path; and

a pass gate, coupled to at least two of the current paths, which receives a control signal that determines whether one of the current paths allows the regulated amount of current to flow through the current path.

10. The driver of claim 9, farther comprising a memory cell that provides the control signal to the pass gate.

11. A driver comprising:

means for selecting one of a plurality of offset voltages;

means for providing a driver current and the selected offset voltage to generate a positive differential voltage or a negative differential voltage based on a data signal; and

means for selecting one of a plurality of values for the driver current to provide a desired differential voltage level for the positive differential voltage and the negative differential voltage.

12. The driver of claim 11, wherein the means for selecting one of the plurality of offset voltages comprises:

a multiplexer that selects one of a plurality of reference voltages; and

an amplifier, coupled to the multiplexer, that receives the selected reference voltage and sets an offset voltage based on the selected reference voltage.

13. The driver of claim 12, wherein the providing means comprises:

a plurality of parallel transistors to provide the driver current, with the number of parallel transistors selectable;

a first pair of transistors that guide the driver current to generate the positive differential voltage when the data signal is asserted; and

a second pair of transistors that guide the driver current to generate the negative differential voltage when the data signal is deasserted.

14. The driver of claim 13, wherein the means for selecting one of the plurality of values for the driver current comprises a plurality of parallel current paths, with the number of parallel current paths selectable.

15. The driver of claim 14, wherein the driver is coupled through a differential wire pair to a receiver to form a low voltage differential signaling system.

16. A method of providing a plurality of low voltage differential signal levels from a single driver, the method comprising:

programming a desired offset voltage based on a plurality of selectable reference voltages;

providing a programmable current source and the offset voltage to generate a driver current;

channeling the driver current to provide a positive differential output voltage or a negative differential output voltage based on a value of a data signal; and

limiting the driver current to a specified value to provide a desired value for the positive differential output voltage and the negative differential output voltage.

17. The method of claim 16, wherein the limiting of the driver current is programmable to provide a plurality of selectable values for the driver current.

18. The method of claim 17, further comprising providing a reference current which is employed to derive the plurality of selectable values.