Hardware portrait mode support

• US 6,639,603 B1
• Filed: 04/21/1999
• Issued: 10/28/2003
• Est. Priority Date: 04/21/1999
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Original Assignee: Linkup Systems Corporation (Neomagic Corporation)
• Inventors: Ishii, Takatoshi
• Primary Examiner(s): Chauhan, Ulka J.
• Application Number:
  US09/296,199
• Time in Patent Office: 1,651 Days
• Field of Search: 345/501-503, 345/520, 345/533, 345/545, 345/564, 345/568, 345/569, 345/656, 345/658, 345/659
• US Class Current: 345/568
• CPC Class Codes: G09G 2340/0464 Positioning
• CPC Class Codes: G09G 2340/0471 Vertical positioning
• CPC Class Codes: G09G 2340/0478 Horizontal positioning
• CPC Class Codes: G09G 2360/128 Frame memory using a Synchronous Dynamic RAM [SDRAM]
• CPC Class Codes: G09G 5/391 Resolution modifying circuits, e.g. variable screen formats
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

A display subsystem supports both normal mode and portrait mode displays. In normal mode, the scan starts at the upper left comer of the display. In portrait mode, the scan starts at the lower left comer of the display. The display subsystem includes a dual mapped display memory having a normal mode display area and a portrait mode display area. The portrait mode display area is defined by X-ofst_(Virtual) and Y-ofst. X-ofst_(Virtual) is a power of two that is greater than the real X-ofst supported by the display in portrait mode. Address requests from the CPU or software use high order bits to specify whether the address is in the normal or portrait mode display area. In addition, address requests to the portrait mode display area use the address space defined by X-ofst_(Virtual) and Y-ofst. When the address request specifies the portrait mode display area, the address of the request is translated to account for the different mode of the display. Since X-ofst_(Virtual) is a power of two, the X-coordinate of the display location specified by the address can be determined without a division operation, thereby allowing for fast address translation. Logic within the display subsystem rapidly translates the address and supports a range of Y-ofst values.

Claims

1. A method of translating an address, comprising the steps of:

defining a first access region having first and second offsets, the first offset exceeding a first displayed extent of a display and the second offset equal to a second displayed extent of the display, wherein the second offset is not equal to a power of two; and

receiving a fist address capable of addressing the defined first access region, the first address using the first and second offsets to specify a location on the display for a first orientation of the display, and

translating the first address into a second address, the second address specifying the location on the display for a second orientation of the display.

2. The method of claim 1, wherein the specified location is within the first and second displayed extents of the display.

3. The method of claim 1, wherein the location specified on the display by the first address comprises first and second coordinates and the translating step comprises the steps of:

determining the first and second coordinates for the location from the first address and the first and second offsets;

swapping the first and second coordinates;

inverting the second coordinate; and

calculating the second address from the swapped first and second coordinates and the invented second coordinate.

4. The method of claim 1, further comprising the step of:

defining a second access region having Third and fourth offsets, the third offset corresponding to a third displayed extent of the display and the fourth offset corresponding to a fourth displayed extent of the display.

5. The method of claim 4, wherein the step of receiving the first address comprises the step of:

determining whether tie first address specifies a location in the first access region.

6. The method of claim 5, wherein the translating step is performed only if the first address specifies a location in the first access region.

7. A system for displaying data on a display, the system comprising:

an addressable memory for holding data for display, wherein a region of the memory defines a display area having real first and second offsets;

an interface for receiving a request to access data at a first address in the memory, wherein the first address specifies a position in the display area using a Virtual fist offset and the real second offset, wherein the real second offset is not equal to a power of two; and

an address translator for receiving the request from the interface and selectively translating the request from the first address to a second address, wherein the second address specifies the position in the display area using the real first and second offsets.

8. The system of claim 7, wherein the virtual first offset is a power of two and exceeds the real offset.

9. The system of claim 7, further comprising:

a memory controller coupled to the address translator and the addressable memory, the memory controller for reading from and writing to addresses in the memory responsive to translated requests received from the address translator.

10. The system of claim 7, wherein the address translator comprises:

address translation logic for controllably translating the memory request from the first address to the second address.

11. The system of claim 10, wherein the address translation logic translates the request from the first address to the second address using one of a selected range of real second offsets.

12. The system of claim 7, wherein the addressable memory further comprises:

a second region defining a separate second display area.

13. The system of claim 12, wherein the request comprises at least one region selection bit, further comprising:

circuitry for enabling the address translator and selecting between the separate first and second display areas responsive to a state of the region selection bit.

14. A display subsystem for a computer system supporting first and second orientations of a display coupled to the computer system, the display subsystem comprising:

a memory for holding display data, the memory comprising;

a first access region adapted to hold display data for the first orientation of the display, wherein the first access region is defined by a first offset exceeding a first displayed extent of the display and a second offset equal to a second displayed extent of the display, wherein the second offset is not equal to a power of two; and

a second access region separate from the first access region and adapted to hold display data for the second orientation of the display; and

an address translator for receiving a memory request using the first and second offsets to specify an address in the first access region and for translating the memory request to reflect the first orientation of the display.

15. A display subsystem for a computer system supporting first and second orientations of a display coupled to the computer system, the display subsystem comprising:

a memory for holding display data, the memory comprising;

a first access region adapted to hold display data for the first orientation of the display, wherein the first access region is defined by X-ofst_(Real), which defines an extent of the display in an X dimension, X-ofst_(Virtual), which defines an extent in the X dimension exceeding X-ofst_(Real), and Y-ofst, which defines an extent of the display in a Y dimension, and wherein the Y-ofst is not equal to a power of two; and

a second access region separate from the first access region and adapted to hold display data for the second orientation of the display; and

an interface for receiving memory requests from the computer system, the memory requests specifying addresses in the first and second access regions, wherein a memory request specifies an address in the first access region using X-ofst_(Virtual) and Y-ofst.