Ferroelectric memory device and method of driving the same
First Claim
1. A method of driving a ferroelectric memory device having a memory cell array in which a plurality of memory cells each of which has at least one ferroelectric capacitor are arranged,wherein three or more values of data are selectively stored in the ferroelectric capacitor by applying voltages having three or more different values for setting three or more polarization states in the ferroelectric capacitor;
- wherein each of the memory cells includes one word line, two bit lines, one plate line, two transistors and two ferroelectric capacitors;
wherein a gate of a first transistor is connected to the word line, source/drains of the first transistor are respectively connected to a first bit line and a first electrode of a first ferroelectric capacitor, and a second electrode of a first ferroelectric capacitor is connected to the plate line; and
wherein a gate of a second transistor is connected to the word line, source/drains of the second transistor are respectively connected to a second bit line and a first electrode of a second ferroelectric capacitor, and a second electrode of the second ferroelectric capacitor is connected to the plate line;
a first step of applying a first predetermined voltage to the first ferroelectric capacitor in a memory cell selected from the plurality of memory cells to put the first ferroelectric capacitor in a polarization state;
a second step of selectively writing three or more values of data in the first ferroelectric capacitor of the selected memory cell by applying voltages having three or more different values for setting three or more polarization states in the first ferroelectric capacitor, and also applying a second predetermined voltage to the second ferroelectric capacitor to put the second ferroelectric capacitor in a polarization state; and
a third step of applying a third predetermined voltage to the first and second ferroelectric capacitors in the selected memory cell to read out data based on variations in a polarization state of the first and second ferroelectric capacitors.
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Abstract
A ferroelectric memory device includes a memory cell array in which a plurality of memory cells having at least one ferroelectric capacitor are arranged. Three or more values of data (Pr(0), P1(1), and −Pr(2), for example) can be selectively stored in the ferroelectric capacitor by applying voltages having three or more different values for setting three or more polarization states in the ferroelectric capacitor.
21 Citations
4 Claims
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1. A method of driving a ferroelectric memory device having a memory cell array in which a plurality of memory cells each of which has at least one ferroelectric capacitor are arranged,
wherein three or more values of data are selectively stored in the ferroelectric capacitor by applying voltages having three or more different values for setting three or more polarization states in the ferroelectric capacitor; -
wherein each of the memory cells includes one word line, two bit lines, one plate line, two transistors and two ferroelectric capacitors;
wherein a gate of a first transistor is connected to the word line, source/drains of the first transistor are respectively connected to a first bit line and a first electrode of a first ferroelectric capacitor, and a second electrode of a first ferroelectric capacitor is connected to the plate line; and
wherein a gate of a second transistor is connected to the word line, source/drains of the second transistor are respectively connected to a second bit line and a first electrode of a second ferroelectric capacitor, and a second electrode of the second ferroelectric capacitor is connected to the plate line;
a first step of applying a first predetermined voltage to the first ferroelectric capacitor in a memory cell selected from the plurality of memory cells to put the first ferroelectric capacitor in a polarization state;
a second step of selectively writing three or more values of data in the first ferroelectric capacitor of the selected memory cell by applying voltages having three or more different values for setting three or more polarization states in the first ferroelectric capacitor, and also applying a second predetermined voltage to the second ferroelectric capacitor to put the second ferroelectric capacitor in a polarization state; and
a third step of applying a third predetermined voltage to the first and second ferroelectric capacitors in the selected memory cell to read out data based on variations in a polarization state of the first and second ferroelectric capacitors. - View Dependent Claims (2, 3, 4)
wherein the third step serves as the first step for a following writing process; - and
wherein a writing process which is the same as the writing process of the second step is performed after the third step.
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3. The method of driving a ferroelectric memory device as defined in claim 2,
wherein the third predetermined voltage applied to the first and second ferroelectric capacitors in the third step is the same as the first predetermined voltage applied to the first ferroelectric capacitor in the first step. -
4. The method of driving a ferroelectric memory device as defined in claim 1, wherein at least one polarization state among the three or more polarization states is a partial polarization state.
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