Distributed type switching system

• US 6,639,920 B2
• Filed: 03/22/2002
• Issued: 10/28/2003
• Est. Priority Date: 09/16/1986
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Amada, Eiichi, Kato, Takao, Kuwahara, Hiroshi, Gohara, Shinobu, Sakurai, Yoshito, Ohtsuki, Kenichi
• Primary Examiner(s): Ton, Dang
• Assistant Examiner(s): HOM, SHICK C
• Application Number:
  US10/102,912
• Publication Number:
  US 20020126649A1
• Time in Patent Office: 585 Days
• Field of Search: 370/355, 370/389, 370/392, 370/396, 370/398, 370/400, 370/401, 370/402, 370/471, 370/475, 370/354, 370/369
• US Class Current: 370/471
• CPC Class Codes: H04J 2203/0012 Switching modules and their interconnections
• CPC Class Codes: H04L 12/56 Packet switching systems
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 12/6402 Hybrid switching fabrics
• CPC Class Codes: H04L 2012/5651 Priority, marking, classes
• CPC Class Codes: H04L 2012/5652 Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 2012/6481 Speech, voice
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/106 using space switching, e.g. crossbar or matrix
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/1553 Interconnection of ATM switching modules, e.g. ATM switching fabrics
• CPC Class Codes: H04L 49/1584 Full Mesh, e.g. knockout
• CPC Class Codes: H04L 49/205 Quality of Service based
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/255 Control mechanisms for ATM switching fabrics
• CPC Class Codes: H04L 49/256 Routing or path finding in ATM switching fabrics
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/3018 : Input queuing
• CPC Class Codes: H04L 49/3081 : ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/309 : Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/35 : Switches specially adapted for specific applications
• CPC Class Codes: H04Q 11/0407 : using a stored programme control
• CPC Class Codes: H04Q 11/0421 : Circuit arrangements therefor
• CPC Class Codes: H04Q 11/06 : Time-space-time switching

Abstract

A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.

Claims

1. A packet switching system comprising:

a plurality of first modules,

wherein each first module includes a controller and a first memory storing information of a destination of information to be received,

wherein a destination of received information is determined by said controller based on content of said first memory, and when said destination is determined to be another first module different from said first module, said first module converts said received information to a fixed-length packet having a header and an information field and outputs said fixed-length packet to said another first module;

a second module having a switch which interconnects said plurality of first modules together,

wherein said second module outputs said fixed-length packet received from said first module to said another first module which is said destination of said received information; and

a collision preventing circuit which controls transmission and reception timings of fixed-length packets among said first modules and said second module so that fixed-length packets transmitted among said first modules and said second module do not collide against each other in said second module.

2. The packet switching system according to claim 1, wherein transfer of said fixed-length packet among said first modules and said second module is performed by multiplexing said fixed-length packet on a predetermined frame and said collision preventing circuit controls an input timing of said fixed-length packet to a space switch.

3. The packet switching system according to claim 1, wherein each of said first modules includes a second memory for storing said received information, stores said received information in said second memory, converts said received information to said fixed-length packet and outputs said fixed-length packet.

4. The packet switching system according to claim 1, wherein said another first module which is the destination of said received information, removes the header of said fixed-length packet received from said second module so as to convert it to information as received by said first module which comprises said information field of said fixed-length packet.

5. The packet switching system according to claim 1, said switch of said second module comprises a space switch.

6. The packet switching system according to claim 1, said switch of said second module comprises a self-routing switch which switches said fixed-length packet based content of the header of said fixed-length packet.