Method and apparatus for pulse overlap pre-compensation in digitally modulated signals

• US 6,639,949 B2
• Filed: 12/17/2001
• Issued: 10/28/2003
• Est. Priority Date: 12/17/2001
• Status: Expired due to Term

• Current Assignee: iBiquity Digital Corporation (Adeia Inc.)
• Original Assignee: iBiquity Digital Corporation (Adeia Inc.)
• Inventors: Bronder, Joseph Bertram, Kroeger, Brian William
• Primary Examiner(s): PHU, PHUONG M
• Application Number:
  US10/022,632
• Publication Number:
  US 20030112890A1
• Time in Patent Office: 680 Days
• Field of Search: 375/295, 375/296, 375/297, 375/285, 375/219, 375/222, 375/223, 375/221, 375/232, 375/230, 375/229, 375/233, 455/296, 455/501, 455/63, 381/3, 381/4, 381/14, 381/94, 381/98, 381/103, 282/244
• US Class Current: 375/296
• CPC Class Codes: H04H 20/36 for AM broadcasts
• CPC Class Codes: H04H 60/07 characterised by processes or methods for the generation
• CPC Class Codes: H04L 2025/03414 Multicarrier
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 27/26265 Arrangements for sidelobes suppression specially adapted to multicarrier systems, e.g. spectral precoding
• CPC Class Codes: H04L 27/2627 Modulators

Abstract

A method of pre-compensating for pulse overlap in a digitally modulated signal comprises the steps of receiving a sequence of pulses, modulating the pulses to produce a first sequence of modulated pulses, demodulating the first sequence of modulated pulses to produce a first sequence of demodulated pulses, combining the first sequence of demodulated pulses with the first sequence of pulses to produce a first sequence of error pulses, modulating the first sequence of error pulses to produce a first sequence of modulated error pulses, and combining the first sequence of modulated error pulses with the first sequence of modulated pulses to produce a first sequence of compensated pulses. The invention further encompasses a method of pre-compensating for pulse overlap in a digitally modulated signal comprising the steps of receiving a sequence of pulses, modulating the pulses to produce a sequence of modulated pulses, storing the modulated pulses, using non-consecutive pairs of the modulated pulses to produce a sequence of first order error terms, storing the sequence of first order error terms, and subtracting each of the first order error terms from corresponding ones of the modulated pulses to produce a first compensated signal.

Claims

1. A method of pre-compensating for pulse overlap in a digitally modulated signal, the method comprising the steps of:

receiving a sequence of signal pulses;

modulating the signal pulses to produce a first sequence of modulated pulses;

demodulating the first sequence of modulated pulses to produce a first sequence of demodulated pulses;

combining the first sequence of demodulated pulses with the sequence of signal pulses to produce a first sequence of error pulses;

modulating the first sequence of error pulses to produce a first sequence of modulated error pulses; and

combining the first sequence of modulated error pulses with the first sequence of modulated pulses to produce a first sequence of compensated pulses.

2. The method of claim 1, further comprising the steps of:

demodulating the first sequence of compensated pulses to produce a second sequence of demodulated pulses;

combining the second sequence of demodulated pulses with the sequence of signal pulses to produce a second sequence of error pulses;

modulating the second sequence of error pulses to produce a second sequence of modulated error pulses; and

combining the second sequence of modulated error pulses with the first sequence of compensated pulses to produce a second sequence of compensated pulses.

9. The method of claim 1, wherein the digitally modulated signal is an orthogonally frequency division multiplexed signal.

3. A method of pre-compensating for pulse overlap in a digitally modulated signal, the method comprising the steps of:

receiving a sequence of pulses;

modulating the pulses to produce a sequence of modulated pulses;

storing the modulated pulses;

using non-consecutive pairs of the modulated pulses to produce a sequence of first order error terms;

storing the sequence of first order error terms; and

subtracting each of the first order error terms from corresponding ones of the modulated pulses to produce a first compensated signal.

4. The method of claim 3, further comprising the steps of:

using non-consecutive pairs of the first order error terms to produce a sequence of second order error terms;

storing the sequence of second order error terms; and

adding each of the second order error terms to corresponding pulses in the first compensated signal to produce a second compensated signal.

10. The method of claim 3, wherein the digitally modulated signal is an orthogonally frequency division multiplexed signal.

5. An apparatus for pre-compensating for pulse overlap in a digitally modulated signal, the apparatus comprising:

an input receiving a sequence of signal pulses;

a first modulator for modulating the signal pulses to produce a first sequence of modulated pulses;

a first demodulator for demodulating the first sequence of modulated pulses to produce a first sequence of demodulated pulses;

a first combiner for combining the first sequence of demodulated pulses with the sequence of signal pulses to produce a first sequence of error pulses;

a second modulator for modulating the first sequence of error pulses to produce a first sequence of modulated error pulses; and

a second combiner for combining the first sequence of modulated error pulses with the first sequence of modulated pulses to produce a first sequence of compensated pulses.

6. The apparatus of claim 5, further comprising:

a second demodulator for demodulating the first sequence of compensated pulses to produce a second sequence of demodulated pulses;

a third combiner for combining the second sequence of demodulated pulses with the sequence of signal pulses to produce a second sequence of error pulses;

a third modulator for modulating the second sequence of error pulses to produce a second sequence of modulated error pulses; and

a fourth combiner for combining the second sequence of modulated error pulses with the first sequence of compensated pulses to produce a second sequence of compensated pulses.

11. The apparatus of claim 5, wherein the digitally modulated signal is an orthogonally frequency division multiplexed signal.

7. A apparatus for pre-compensating for pulse overlap in a digitally modulated signal, the apparatus comprising:

an input for receiving a sequence of pulses;

a first modulator for modulating the pulses to produce a sequence of modulated pulses;

a first storage element for storing the modulated pulses;

a first combiner for using non-consecutive pairs of the modulated pulses to produce a sequence of first order error terms;

a second storage element for storing the sequence of first order error terms; and

a second combiner for subtracting each of the first order error terms from corresponding ones of the modulated pulses to produce a first compensated signal.

8. The apparatus of claim 7, further comprising

a third combiner for using non-consecutive pairs of the first order error terms to produce a sequence of second order error terms;

a third storage element for storing the sequence of second order error terms; and

a fourth combiner for adding each of the second order error terms to corresponding pulses in the first compensated signal to produce a second compensated signal.

12. The apparatus of claim 7, wherein the digitally modulated signal is an orthogonally frequency division multiplexed signal.

13. An apparatus for pre-compensating for pulse overlap in a digitally modulated signal, the apparatus comprising:

means for receiving a sequence of signal pulses;

means for modulating the signal pulses to produce a first sequence of modulated pulses;

means for demodulating the first sequence of modulated pulses to produce a first sequence of demodulated pulses;

means for combining the first sequence of demodulated pulses with the sequence of signal pulses to produce a first sequence of error pulses;

means for modulating the first sequence of error pulses to produce a first sequence of modulated error pulses; and

means for combining the first sequence of modulated error pulses with the first sequence of modulated pulses to produce a first sequence of compensated pulses.

14. The apparatus of claim 13, further comprising:

means for demodulating the first sequence of compensated pulses to produce a second sequence of demodulated pulses;

means for combining the second sequence of demodulated pulses with the sequence of signal pulses to produce a second sequence of error pulses;

means for modulating the second sequence of error pulses to produce a second sequence of modulated error pulses; and

means for combining the second sequence of modulated error pulses with the first sequence of compensated pulses to produce a second sequence of compensated pulses.

15. A apparatus for pre-compensating for pulse overlap in a digitally modulated signal, the apparatus comprising:

means for receiving a sequence of pulses;

means for modulating the pulses to produce a sequence of modulated pulses;

means for storing the modulated pulses;

means for using non-consecutive pairs of the modulated pulses to produce a sequence of first order error terms;

means for storing the sequence of first order error terms; and

means for subtracting each of the first order error terms from corresponding ones of the modulated pulses to produce a first compensated signal.

16. The apparatus of claim 15, further comprising:

means for using non-consecutive pairs of the first order error terms to produce a sequence of second order error terms;

means for storing the sequence of second order error terms; and

means for adding each of the second order error terms to corresponding pulses in the first compensated signal to produce a second compensated signal.