Broadcast receiver

• US 6,640,093 B1
• Filed: 06/28/2000
• Issued: 10/28/2003
• Est. Priority Date: 06/29/1999
• Status: Expired due to Fees

• Current Assignee: Sony Limited (Sony Group Corp.)
• Original Assignee: Sony Limited (Sony Group Corp.)
• Inventors: Wildhagen, Jens
• Primary Examiner(s): Trost, William
• Assistant Examiner(s): D AGOSTA, STEPHEN M
• Application Number:
  US09/605,966
• Time in Patent Office: 1,217 Days
• Field of Search: 455/130-150, 455/164-168, 455/178-191, 455/219, 455/227-253, 375/316-351, 375/354-376, 348/726
• US Class Current: 455/130
• CPC Class Codes: H04H 40/18 Arrangements characterised by circuits or components specially adapted for receiving
• CPC Class Codes: H04L 27/0008 arrangements for allowing a transmitter or receiver to use more than one type of modulation negotiating modulation type for two-way transmission paths H04L5/1453

Abstract

A receiver for broadcast signals, e.g. DAB, FM, DVB, and digital or analog short-wave RF broadcast signals according to the present invention includes a polyfunctional circuit (5) that can be switched into three modes and performs the digital frequency demodulation which is needed for the reception of a frequency modulated signal in a first mode A, a digital frequency adjustment of the receiver in case of the reception of a digital or analog modulated broadcast signal like DAB, DVB, DRM or AM in a second mode B and the digital frequency adjustment and the digital gain control of the receiver which is needed in case of the reception of a digitally modulated broadcast signal like DAB, DVB, DRM in a third mode C. Depending on the needed functionality not all of these modes need to be realized. Nevertheless, the same hardware will be used for different purposes although the circuit is realized with an optimized amount of hardware to realize an efficient receiver.

Claims

1. Receiver for broadcast signals, characterized by:

a polyfunctional circuit (5) receiving a complex baseband signal (z(k)) generated from a respective RF broadcast signal that is able to perform either mode C, or mode C and mode A and/or mode B, or mode A and mode B of the below defined modes,

mode A;

frequency demodulation of the complex baseband signal (z(k)) to generate and output a multiplexed digital audio signal (MPX(k)) wherefrom a digital audio signal is generated in case an analog FM broadcast signal should be processed,

mode B;

digital frequency adjustment of the complex baseband signal (z(k)) to generate and output a frequency corrected complex baseband signal (w_B(k)) wherefrom a digital audio or video signal is generated in case a digitally or analog modulated broadcast signal should be processed,

mode C;

frequency and amplitude adjustment of the complex baseband signal (z(k)) to generate and output a frequency and amplitude corrected complex baseband signal (w_C(k)) wherefrom a digital audio or video signal is generated in case a digitally modulated broadcast signal should be processed;

an antenna (1) to receive and output said respective RF broadcast signal;

a front-end block (2) connected to said antenna (1) to downconvert the received RF broadcast signal to output an IF signal;

an A/D converter (3) connected to said front-end block (2) to digitize the IF signal to output a digital IF signal;

an IQ generator (4) connected to said A/D converter (3) to generate and output said complex baseband signal (z(k)) to said polyfunctional circuit (5); and

at least one of the following three circuits;

a demultiplexer (6A) receiving said multiplexed digital audio signal (MPX(k)) from said polyfunctional circuit (5) to output said digital audio signal in case a FM signal should be processed;

a short-wave processing circuit (6B) receiving said frequency corrected complex baseband signal (w_B(k)) or said frequency and amplitude corrected complex baseband signal (w_C(k)) from said polyfunctional circuit (5) to output said digital audio or video signal in case a digitally or analog modulated broadcast signal should be processed; and

a DAB processing circuit (6C) receiving said frequency corrected complex baseband signal (wB(k)) or said frequency and amplitude corrected complex baseband signal (wc(k)) from said polyfunctional circuit (5) to output said digital audio signal in case a DAB broadcast signal should be processed; and

a D/A converter (7) to receive the digital audio signal and to output an analog audio signal;

whereby a neighbor channel suppression is performed by at least one of said polyfunctional circuit, said short-wave processing circuit and said IQ generator.

2. Receiver according to claim 1, characterized in that

said short-wave processing circuit (6B) is performing a neighbor channel suppression, a demodulation, an adjustment and additional processing to generate said digital audio signal;

said DAB processing circuit (6C) is performing a FFT, a de-interleaving, a Viterbi-decoding, an adjustment and a MPEG-decoding to generate said digital audio signal.

3. Receiver according to claim 1, characterized in that

said IQ generator (4) is performing a neighbor channel suppression besides the generation of said complex baseband signal (z(k)).

4. Receiver according to claim 1, characterized in that

said polyfunctional circuit (5) includes a FIR-filter (5c) to also perform a neighbor channel suppression on said complex baseband signal (z(k), g(1)) in case a FM broadcast signal should be processed.

5. Receiver according to claim 1, characterized in that said polyfunctional circuit (5) includes a CORDIC calculation unit (5a) receiving input samples of said complex baseband signal (z(k))

that is working in vector mode to output a phase of every input sample of the complex baseband signal that is fed into a differentiation unit (5b) that is calculating and outputting said multiplexed digital audio signal (MPX(k)) in case an FM broadcast signal should be processed;

that is working in rotation mode and is additionally receiving a frequency offset (Δ

f(k)) via an integrator (5d) to rotate every input sample by a phase value (φ

(k)) that corresponds to the integrated frequency offset (Δ

f(k)) to output said frequency corrected complex baseband signal (w_B(k), w_C(k)) in case a digitally or analog modulated broadcast signal should be processed.

6. Receiver according to claim 5, characterized in that said CORDIC calculation unit (5a) receives every input sample of said complex baseband signal (z(k)) via a pre-amplification unit (5e) and outputs said frequency and amplitude corrected complex baseband signal (w_C(k)) via a fine amplification unit (5f) in case a digitally modulated broadcast signal should be processed, said amplification units (5e, 5f) are respectively receiving an input signal (d(k)) that is calculated by a averaging lowpass filtering an absolute value of the received input sample.

7. Receiver according to claim 6, characterized in that said averaging lowpass filtering of an absolute value of the received input sample is performed by calculating an absolute value (|y(k)|, |x(k)|) of the received input sample with an absolute calculation unit (5g) and filtering the absolute of the quadrature component (y(k)) or the inphase component (x(k)) of the input sample of the complex baseband signal (z(k)) with an averaging lowpass filter (5h) comprising:

a first multiplier (5i) multiplying said absolute value (|y(k)|, |x(k)|) of the received input sample with a constant (A);

a first adder (5j) connected to said first multiplier (5i) and receiving its multiplication result and an output signal (d(k)) of the averaging lowpass filter (5h) that got time delayed by a delay circuit (5m) having a delay T to add both signals;

a second adder (5k) connected to said first adder (5j) receiving its calculated sum and an output signal (d(k)) of the averaging lowpass filter (5h) that got time delayed by said delay circuit (5m) and multiplied by said constant (A) with a second multiplier (51) to subtract the latter signal from the former signal to calculate said output signal (d(k)) of the averaging lowpass filter (5h).

8. Receiver according to claim 7, characterized in that said first multiplier (5i) is realized by a shift register.

9. Receiver according to claim 1, characterized in that said polyfunctional circuit (5) comprises the following elements in case all functionalities are realized:

a multifunction circuit (51) receiving the frequency offset (Δ

f(k)) and the complex baseband signal (z(k)) and outputting one output signal (D) having the functionality to perform;

an integration of a frequency offset (Δ

f(k)), a microrotation control and summation, and an averaging of the complex baseband signal (z(k)) in case a frequency and amplitude adjustment should be processed;

a microrotation summation and differentiation in case a frequency demodulation should be processed;

an integration of the frequency offset (Δ

f(k)), a microrotation control in case a frequency adjustment should be processed;

a rotation circuit (52) receiving the complex baseband signal (z(k)) and outputting first and second output signals having the functionality to perform

the standard CORDIC algorithm;

an amplification of the complex baseband signal (z(k)) controlled by a control signal; and

a multiplexing output circuit receiving the output signal (D) of the multifunction circuit (51) and the first and second output signals of the rotation circuit (52) and outputting the multiplexed processed baseband signal (w_B(k), w_C(k)) or the multiplexed digital audio signal (MPX(k)).

10. Receiver according to claim 9, characterized in that said polyfunctional circuit (5) comprises additionally a ring buffer circuit (57) receiving the inphase and quadrature components (g_I(1), g_Q(1)) of said complex baseband signal (g(1)) that leads one of an inphase component (g_I) or a quadrature component (g_Q) to the multifunction circuit (51) and the inphase and quadrature components (g_I, g_Q) to the rotation circuit (52).

11. Receiver according to claim 9, characterized in that said multifunction circuit (51) comprises:

a first switch (S1) receiving the frequency offset (Δ

f(k)) at a first input terminal;

a second switch (S2) having a first input terminal connected to a moveable output terminal of the first switch (S1);

a fourth switch (S4) having a second input terminal connected to a moveable output terminal of the second switch (S2);

a first adder/subtracter (A1) having a first input that receives the first summand or diminuend connected to a moveable output terminal of the fourth switch (S4);

a third delay circuit (511) having a delay T that receives the sum or difference calculated by said first adder/subtracter (A1) at a first input, a second latch signal (LE2) at a second input and which output outputs an output signal (D) of said multifunction circuit (51) and is also connected to a first terminal of said fourth switch (S4);

a fifth switch (S5) receiving said complex baseband signal (z(k)) or one of the inphase component (g_I) or the quadrature component (g_Q) at a first input terminal and having a second input terminal connected to the output of said third delay circuit (511);

a multiplication circuit (512) multiplying with a constant (A) having an input connected to a moveable output terminal of said fifth switch (S5);

a sixth switch (S6) having a first input terminal connected to an output of said multiplication circuit (512);

a sixteenth switch (S16) having a first input terminal connected to a constant value source (513) which represents a constant frequency offset in mode B, a second input terminal connected to a moveable output terminal of said sixth switch (S6) and a moveable output terminal connected to a second input of said first adder/subtracter (A1) that receives the second summand or the subtrahend;

a first delay circuit (514) having a delay T and having an input connected to an output of said first adder/subtracter (A1) and an output connected to a second input terminal of said second switch (S2);

a second delay circuit (515) having a delay T and having a first input connected to an output of said first delay circuit (514) and having a second input connected to a first latch signal (LE1); and

a third switch (S3) having a first input terminal connected to the output of said first delay circuit (515), a second input terminal connected to a ROM (516) and an output connected to a second input terminal of said sixth switch (S6).

12. Receiver according to claim 11, characterized in that said multiplication circuit (512) is realized by a shift register.

13. Receiver according to claim 9, characterized in that said rotation circuit (52) comprises:

a seventh switch (S7) receiving the complex baseband signal (z(k)) or the inphase component (g_I) at a first input terminal;

an eighth switch (S8) having a second input terminal connected to a moveable output terminal of said seventh switch (S7);

a first shift register (521) having an input connected to a moveable output terminal of said eighth switch (S8) and a control input connected to a first shift signal (Sh1);

a first amplification and saturation block (523) performing an amplification and saturation having an input connected to an output of said first shift register (521);

a twelfth switch (S12) having a first input terminal connected to an output of said first amplification and saturation block (523) and a second input terminal to the output of said first shift register (521);

a second adder/subtracter (A2) having a second input receiving the second summand or the subtrahend connected to a moveable output terminal of said twelfth switch (S12);

a fourth delay circuit (524) having a delay T and having an input connected to an output of said second adder/subtracter (A2) and an output that provides a first output signal of said rotation circuit (52) connected to a first input terminal of said eighth switch (S8);

a tenth switch (S10) that has a first input terminal connected to an output of said fourth delay circuit (524) and a moveable output terminal connected to a first input of said second adder/subtracter (A2) that receives the first summand or diminuend;

a ninth switch (S9) that receives an output of said fourth delay circuit (524) at a second input terminal;

a second shift register (522) having an input connected to a moveable output terminal of said ninth switch (S9) and a control input connected to a second shift signal (Sh2);

a third adder/subtracter (A3) having a second input receiving the second summand or the subtrahend connected to an output of said second shift register (522);

a fifth delay circuit (525) having a delay T and having an input connected to an output of said third adder/sub tracter (A3) and an output that provides a second output signal of said rotation circuit (52) connected to a first input terminal of said ninth switch (S9) and to a second input terminal of said seventh switch (S7); and

an eleventh switch (S11) that has a first input terminal connected to an output of said fifth delay circuit (525) and a moveable output terminal connected to a first input of said third adder/subtracter (A2) that receives the first summand or diminuend.

14. Receiver according to claim 13, characterized in that said rotation circuit (52) additionally comprises:

a nineteenth switch (S19) that receives the quadrature component (g_Q) of the complex baseband signal (g(1)) via said ring buffer circuit (57) at a first input terminal, having a second input terminal connected to the output of said fourth delay circuit (524) and a moveable output terminal connected to the second input terminal of said ninth switch (S9).

15. Receiver according to claim 10, characterized in that said ring buffer circuit (57) comprises:

a seventeenth switch (S17) receiving the quadrature component (g_Q(1)) of the complex baseband signal (g(1)) at a first input terminal;

an eighteenth switch (S18) receiving the inphase component (g_I(1)) of the complex baseband signal (g(1)) at a first input terminal;

a ninth delay circuit (59) having a delay 11T and having an input connected to a moveable output terminal of said seventeenth switch (S17) and an output providing the quadrature component (g_Q) of the complex baseband signal (g(1)) being connected to a second input terminal of said seventeenth switch (S17); and

a tenth delay circuit (58) having a delay 11T and having an input connected to a moveable output terminal of said eighteenth switch (S18) and an output providing the inphase component (g_I) of the complex baseband signal (g(1)) being connected to a second input terminal of said eighteenth switch (S18).

16. Receiver according to claim 10, characterized in that said output circuit comprises:

a sixth delay circuit (53) having a delay T receiving said second output signal of the rotation circuit (52) at a first input and a third latch signal (LE3) at a second input and having an output connected to a second input terminal of a thirteenth switch (S13);

a seventh delay circuit (54) having a delay T receiving said first output signal of the rotation circuit (52) at a first input and a fourth latch signal (LE4) at a second input and having an output connected to a first input terminal of said thirteenth switch (S13);

a second amplification and saturation block (55) calculating an amplification and saturation having an input connected to a moveable output terminal of said thirteenth switch (S13);

a fourteenth switch (S14) having a first input terminal connected to an output of said second amplification and saturation block (55) and a second input terminal connected to the moveable output terminal of said thirteenth switch (S13);

a fifteenth switch (S15) having a first input terminal connected to the output (D) of said multifunction circuit (51) and a second input terminal connected to a moveable output terminal of said fourteenth switch (S14); and

an eighth delay circuit (56) having a delay T and having an input connected to a moveable output terminal of said fifteenth switch (S15) and outputting said output signal (w_B(k), w_C(k), MPX(k)) of said polyfunctional circuit (5).

17. Receiver according to claim 1, characterized in that said analog modulated broadcast signal is an AM signal.

18. Receiver according to claim 1, characterized in that said digitally modulated broadcast signal is a DAB, DVB, or DRM signal.