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Semiconductor memory device having a power-on reset circuit

  • US 6,642,757 B2
  • Filed: 09/21/2001
  • Issued: 11/04/2003
  • Est. Priority Date: 09/21/2000
  • Status: Expired due to Term
First Claim
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1. A semiconductor device comprising:

  • an oscillator which starts generating a clock pulse when a power supply voltage supplied from an outside of the semiconductor device becomes higher than a first voltage;

    a charge pump circuit configured to execute charge pumping operation upon receiving said clock pulse;

    a voltage monitor configured to generate a power-on reset signal upon receiving an output voltage from said charge pump circuit;

    an internal power supply terminal configured to supply said power supply voltage as an internal power supply voltage, and a reference voltage generator configured to generate a reference voltage using said output voltage from said charge pump circuit as a power supply, said voltage monitor using said output voltage from said charge pump circuit as a power supply, having a comparator configured to compare a divided voltage of said internal power supply voltage with said reference voltage, and when said internal power supply voltage is higher than a second voltage, outputting a first signal of a first logic level as said power-on reset signal.

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