Differential cascode amplifier

• US 6,642,788 B1
• Filed: 11/05/2001
• Issued: 11/04/2003
• Est. Priority Date: 11/05/2001
• Status: Expired due to Term

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Abughazaleh, Firas N.
• Primary Examiner(s): Shingleton, Michael B
• Application Number:
  US10/011,473
• Time in Patent Office: 729 Days
• Field of Search: 330/253, 330/258, 330/311, 330/136
• US Class Current: 330/253
• CPC Class Codes: H03F 2203/45028 the differential amplifier amplifying transistors are folded cascode coupled transistors
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 3/45219 Folded cascode stages
• CPC Class Codes: H03F 3/45713 Controlling the active amplifying circuit of the differential amplifier

Abstract

A differential amplifier amplifies input signals and includes first and second differential input transistor pairs. The first input pair controls output voltages by adjusting sink currents coupled to the outputs. The second pair of transistors compliments the first pair by dynamically adjusting a current sourced to the outputs. A common mode circuit has also been described that adjusts both the current sourced to the outputs and the sink currents. In one embodiment, the amplifier is fully differential and controls both current source transistors and current sink transistors coupled to the amplifiers outputs.

Claims

1. A differential amplifier comprising:

differential output nodes;

first and second current sources coupled to the differential output nodes;

first and second current sinks coupled to the differential output nodes for sinking current from the differential output nodes;

a first pair of differential input transistors coupled to the first and second current sources to adjust output voltages on the output nodes in response to input signals; and

a second pair of differential input transistors coupled to the first and second current sources to adjust currents provided by the first and second current sources in response to the input signals.

2. The differential amplifier of claim 1 further comprising:

a third pair of differential input transistors coupled to the first and second current sinks to adjust the output voltages on the output nodes in response to the input signals; and

a fourth pair of differential input transistors coupled to the first and second current sinks to adjust their currents in response to the input signals.

3. The differential amplifier of claim 1 further comprising:

common mode circuitry coupled to the first and second current sources to further adjust the currents provided by the first and second current sources in response to a common mode voltage signal.

4. The differential amplifier of claim 3 wherein the common mode circuitry is coupled to adjust currents conducted by the first pair of differential input transistors.

5. The differential amplifier of claim 3 wherein the common mode circuitry is coupled to the first and second current sinks to further adjust the currents provided by the first and second current sources in response to the input signals.

6. The differential amplifier of claim 5 wherein the common mode circuitry is coupled to adjust currents conducted by the third pair of differential input transistors.

7. A differential cascode amplifier comprising:

input connections to receive differential input signals;

output connections to provide differential output signals;

first and second current sources coupled to the output connections;

a first pair of differential input transistors coupled to sink a portion of currents provided by the first and second current sources in response to the input signals; and

a second pair of differential input transistors coupled to adjust currents provided by the first and second current sources in response to the input signals.

8. The differential cascode amplifier of claim 7 wherein the first pair of differential input transistors comprises:

a first transistor coupled between the first current source and a tail current transistor, the first transistor has a gate coupled to receive a first input signal; and

a second transistor coupled between the second current source and the tail current transistor, the second transistor has a gate coupled to receive a second input signal.

9. The differential cascode amplifier of claim 8 further comprising:

common mode circuitry coupled to further adjust the currents provided by the first and second current sources in response to a common mode voltage signal, wherein the common mode circuitry is coupled to distribute a current conducted by the tail current transistor.

10. The differential cascode amplifier of claim 7 further comprising:

first and second current sinks coupled to the output connections;

a third pair of differential input transistors coupled to source current to the first and second current sinks in response to the input signals; and

a fourth pair of differential input transistors coupled to adjust currents sunk by the first and second current sinks in response to the input signals.

11. The differential cascode amplifier of claim 10 wherein the third pair of differential input transistors comprises:

a third transistor coupled between the first current sink and a source current transistor, the third transistor has a gate coupled to receive a first input signal; and

a fourth transistor coupled between the second current sink and the source current transistor, the fourth transistor has a gate coupled to receive a second input signal.

12. The differential cascode amplifier of claim 11 further comprising:

common mode circuitry coupled to further adjust the currents sunk by the first and second current sinks in response to a common mode voltage signal, wherein the common mode circuitry is coupled to distribute a current provided by the source current transistor.

13. A differential cascode amplifier comprising:

input connections to receive differential input signals;

output connections to provide differential output signals;

a first differential circuit coupled to adjust the differential output signals in response to the input signals;

a second differential circuit coupled to adjust source currents electrically coupled to the output connections in response to the input signals; and

common mode circuitry to adjust a combined current sink of the first differential circuit in response to a common mode voltage of the input signals.

14. A differential cascode amplifier comprising:

first and second input connections to receive differential input signals;

first and second output connections to provide differential output signals;

output circuitry coupled to the first and second output connections and comprising,

a first current source transistor electrically coupled to the first output connection,

a first current sink transistor electrically coupled to the first output connection,

a second current source transistor electrically coupled to the second output connection, and

a second current sink transistor electrically coupled to the second output connection;

differential circuitry coupled to the output circuitry and comprising,

a first input transistor electrically coupled to the first output connection,

a second input transistor electrically coupled to the second output connection, and

a tail current transistor coupled to the first and second input transistors, wherein the first and second input transistors sink current from the first and second current source transistors through the tail current transistor in response to the input signals; and

a dynamic bias circuit coupled to gates of the first and second current source transistors.

15. The differential cascode amplifier of claim 14 wherein the dynamic bias circuit comprises a pair of differential transistors coupled to the first and second input connections.

16. The differential cascode amplifier of claim 15 wherein the dynamic bias circuit further comprises a second pair of differential transistors coupled to gates of the first and second current sink transistors.

17. The differential cascode amplifier of claim 14 further comprising a common mode circuit, wherein the common mode circuit is coupled to the gates of the first and second current source transistors, and to the tail current transistor.

18. The differential cascode amplifier of claim 14 wherein the differential circuitry further comprises:

a third input transistor electrically coupled to the first output connection,

a fourth input transistor electrically coupled to the second output connection, and

a source current transistor coupled to the third and fourth input transistors, wherein the third and fourth input transistors source current to the first and second current sink transistors through the source current transistor in response to the input signals.

19. The differential cascode amplifier of claim 14 further comprising a common mode circuit, wherein the common mode circuit is coupled to the gates of the first and second current sink transistors, and to the source current transistor.

20. A method of operating a differential amplifier circuit comprising:

providing source currents to first and second differential output connections in response to first and second differential input signals;

adjusting current levels of the source currents in response to the first and second differential input signals and

partially steering the source currents in response to the first and second differential input signals.

21. The method of claim 20 further comprises adjusting a common mode voltage on the first and second differential output connections.

22. The method of claim 20 wherein providing the source currents comprises controlling first and second current sources using first differential input transistors.

23. The method of claim 22 wherein the first and second current sources are transistors and adjusting the current levels of the source currents comprises adjusting a gate voltage of the transistors.

24. The method of claim 23 wherein the gate voltages of the transistors are adjusted in response to second differential input transistors.

25. A method of dynamically adjusting a differential cascode amplifier comprising:

controlling differential output voltages on output connections in response to differential input voltages using a first pair of differential transistors, wherein the first pair of differential input transistors control current sink paths for sinking a portion of currents provided by current sources coupled to the output connections; and

dynamically adjusting the current sources in response to a second pair of differential input transistors.

26. The method of claim 25 further comprises adjusting the current sink paths from the output connections and the current sources to change a common mode of the output voltages.