Digital image processor for a digital camera

• US 6,642,956 B1
• Filed: 05/29/1998
• Issued: 11/04/2003
• Est. Priority Date: 05/29/1998
• Status: Expired due to Term

• Current Assignee: Nokia Corporation
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Safai, Mohammad A.
• Primary Examiner(s): Vu, Ngoc-Yen, VU, NGOC YEN T
• Application Number:
  US09/087,253
• Time in Patent Office: 1,985 Days
• Field of Search: 348/207.99, 348/207.1, 348/207.11, 348/222.1, 348/231.99, 348/231.2, 348/231.3, 348/231--23, 348/294, 348/311, 348/312, 348/223.1, 348/226--22, 348/272, 348/273, 348/280, 358/906, 358/909.1, 358/518, 358/523, 358/525, 382/162, 382/166, 382/167, 382/299, 382/300
• US Class Current: 348/222.1
• CPC Class Codes: H04N 2209/046 Colour interpolation to calculate the missing colour values
• CPC Class Codes: H04N 23/617 Upgrading or updating of programs or applications for camera control
• CPC Class Codes: H04N 23/631 Graphical user interfaces [GUI] specially adapted for controlling image capture or setting capture parameters
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 23/88 for colour balance, e.g. white-balance circuits or colour temperature control
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/671 for non-uniformity detection or correction
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 5/765 Interface circuits between an apparatus for recording and another apparatus
• CPC Class Codes: H04N 5/772 the recording apparatus and the television camera being placed in the same enclosure
• CPC Class Codes: H04N 5/775 between a recording apparatus and a television receiver
• CPC Class Codes: H04N 5/907 using static stores, e.g. storage tubes or semiconductor memories H04N5/91 takes precedence
• CPC Class Codes: H04N 9/8047 using transform coding

Abstract

The invention relates to a digital camera and the methods for using a digital camera. The digital camera includes a programmable processor that provides for flexible operation of the digital camera. The programmable processor also provides the digital camera manufacturer the capability of economically configuring the digital camera as desired. The programmable processor also provides the digital camera user with on demand specialized imaging modes such as the capture mode and the cineview mode.

Claims

1. A digital image processor for use in a digital camera having an imaging unit that generates digital representations of an image, a memory for storing digital representations of the image, and a processing unit capable of directing components included in the digital camera, the digital image processor comprising:

an input data stream processor for pre-processing images received from the imaging unit and storing the pre-processed images in the memory;

an output data stream processor arranged to receive images and post-process the images into a viewable form; and

a programmable universal controller arranged to generate operational signals useful in the operation of components included in the digital camera, the programmable universal controller comprising an image sensor controller for generating signals useful for synchronizing an image sensor in the imaging unit, wherein the image sensor controller includes a programmable clock generator that may be programmed to generate both symmetric clock signals and non-symmetric clock signals, wherein;

the digital image processor is operable in a first mode in which data corresponding to the pre-processed images from the input data stream processor are directed to the memory, thereby bypassing the output data stream processor; and

the digital image processor is operable in a second mode in which data corresponding to the pre-processed images from the input data stream processor are directed to the output data stream processor for post-processing.

7. A digital camera comprising:

an image capture unit arranged to output digital representations of an image;

a digital image processor as recited in claim 1; and

memory for storing the digital representations of the image.

8. A digital camera as recited in claim 7, wherein the image capture unit comprises:

an image sensor arranged to output analog signals that represent an image;

a converter unit for converting the analog signals to the digital representations of the image.

2. A digital image processor for use in a digital camera having an imaging unit that generates digital representations of an image, a memory for storing digital representations of the image, and a processing unit capable of directing components included in the digital camera, the digital image processor comprising:

an input data stream processor for pre-processing images received from the imaging unit and storing the pre-processed images in the memory;

an output data stream processor arranged to receive images and post-process the images into a viewable form; and

a programmable universal controller arranged to generate operational signals useful in the operation of components included in the digital camera, the programmable universal controller comprising an image sensor controller for generating signals useful for synchronizing an image sensor in the imaging unit, wherein the image sensor controller includes a programmable clock generator that may be programmed to generate both symmetric clock signals and non-symmetric clock signals, and wherein the programmable clock generator is arranged to receive a fast clock signal and includes a programmable logic block having a programmable clock register, wherein the programmable clock register may be programmed using data stored in the programmable logic block to create a desired symmetric or non-symmetric clock signal based at least in part upon the fast clock signal.

3. A digital image processor for use in a digital camera having an imaging unit that generates digital representations of an image, a memory for storing digital representations of the image, and a processing unit capable of directing components included in the digital camera, the digital image processor comprising:

an input data stream processor for pre-processing images received from the imaging unit and storing the pre-processed images in the memory;

an output data stream processor arranged to receive images and post-process the images into a viewable form; and

a programmable universal controller arranged to generate operational signals useful in the operation of components included in the digital camera, the programmable universal controller comprising an image sensor controller for generating signals useful for synchronizing an image sensor in the imaging unit, wherein the image sensor controller includes a programmable clock generator that may be programmed to generate both symmetric clock signals and non-symmetric clock signals, and wherein the programmable clock generator includes a counter buffer arranged to receive a fast clock signal, the counter buffer being connected to a memory unit, wherein the memory unit includes programmable data registers capable of storing clock signal characterizing data used by the counter buffer to create a desired symmetric clock signal or a desired non-symmetric clock signal based at least in part upon the fast clock signal.

4. A digital image processor as recited in claim 3, wherein the clock signal characterizing data includes a clock tick value and an associated clock signal output value.

5. A digital image processor for use in a digital camera having an image sensor that generates digital representations of an image, a memory for storing digital representations of the image, and a processing unit capable of directing components included in the digital camera, the digital image processor comprising:

an input data stream processor for pre-processing images received from the image sensor and storing the pre-processed images in the memory;

an output data stream processor arranged to receive images and post-process the images into a viewable form; and

a programmable universal controller arranged to generate operational signals useful in the operation of components included in the digital camera, the programmable universal controller comprising;

an image sensor controller for generating signals useful for synchronizing the image sensor, and

a programmable analog reference signal generator for generating analog reference signals useful in the operation of analog components included in the digital camera, wherein;

the digital image processor is operable in a first mode in which data corresponding to the pre-processed images from the input data stream processor are directed to the memory, thereby bypassing the output data stream processor; and

the digital image processor is operable in a second mode in which data corresponding to the pre-processed images from the input data stream processor are directed to the output data stream processor for post-processing.

6. A digital image processor for use in a digital camera having an image sensor that generates digital representations of an image, a memory for storing digital representations of the image, and a processing unit capable of directing components included in the digital camera, the digital image processor comprising:

an input data stream processor for pre-processing images received from the image sensor and storing the pre-processed images in the memory;

an output data stream processor arranged to receive images and post-process the images into a viewable form; and

a programmable universal controller arranged to generate operational signals useful in the operation of components included in the digital camera, the programmable universal controller comprising;

an image sensor controller for generating signals useful for synchronizing the image sensor, and

a programmable analog reference signal generator for generating analog reference signals useful in the operation of analog components included in the digital camera, wherein the programmable analog reference signal generator includes;

a programmable register for storing analog reference signal characterizing data; and

a pulse width modulation (PWM) block that uses the analog reference signal characterizing data stored in the programmable register and a fast clock signal to create the desired analog reference signal.