Compressed event counting technique and application to a flash memory system

• US 6,643,187 B2
• Filed: 12/27/2001
• Issued: 11/04/2003
• Est. Priority Date: 09/14/2000
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Mokhlesi, Nima
• Primary Examiner(s): Lam, David
• Application Number:
  US10/033,222
• Publication Number:
  US 20020075728A1
• Time in Patent Office: 677 Days
• Field of Search: 365/185.33, 365/185.29, 365/185.11, 365/218, 365/236, 365/230.03, 365/189.07
• US Class Current: 365/185.33
• CPC Class Codes: G11C 16/06 Auxiliary circuits, e.g. for writing into memory

Abstract

A non-volatile flash memory system counts the occurrences of an event, such as the number of times that individual blocks have been erased and rewritten, by updating a compressed count only once for the occurrence of a large number of such events. A random or pseudo-random number generator outputs a new number in response to individual occurrences of the event, and updates the compressed count when an output of the random number generator matches a predetermined number. The probability of the predetermined number being generated by the random number generator in response to a single event may be varied as the function of some other factor, such as the value of the compressed count, when that provides more useful tracking of the number of events. These techniques also have application to monitoring other types of recurring events in flash memory systems or in other types of electronic systems.

Claims

1. A circuit, comprising:

a memory maintaining a compressed count of the number of occurrences of an event; and

a incrementer connected to said memory maintaining the compressed count to update the compressed count in response to an occurrence of said event, the incrementer comprising;

a random number generator connected to receive an enable signal provided in response to the occurrence and generate a random or pseudo-random number in response thereto;

a memory storing a predetermined number; and

a comparator connected to the memory storing a predetermined number and to the random number generator to receive the generated random or pseudo-random number, wherein the compressed count is updated when generated random or pseudo-random number matches the predetermined number.

2. The circuit of claim 1, wherein the incrementer further comprises:

a seed source connected to provide a seed value to the random number generator.

3. The circuit of claim 1, wherein the compressed count is updated by incrementing its value by one.

4. The circuit of claim 1, wherein the compressed count is updated by decrementing its value by one.

5. The circuit of claim 1, wherein the circuit further comprises:

a non-volatile memory, wherein said event is an erase operation in said memory.

6. The circuit of claim 5, wherein the memory maintaining a compressed count is part of said non-volatile memory.

7. The circuit of claim 5, wherein the circuit further comprises:

an interface to receive an instruction to issue an erase command and connected to the non-volatile memory and to the incrementer, whereby said erase operation is performed and said enable signal is provided.

8. The circuit of claim 7, wherein the circuit further comprises:

a power supply connected to the interface and the non-volatile memory, whereby voltage pulses are generated and supplied to said non-volatile memory in response to the erase command.

9. A method, comprising:

determining whether an event has occurred;

generating a random or pseudo-random number in response to said event occurring;

comparing the generated random or pseudo-random number to a predetermined number; and

updating a compressed count of the number of occurrences of said event if the generated random or pseudo-random number matches the predetermined number.

10. The method of claim 9, wherein said event is an erase operation in a non-volatile memory.

11. The method of claim 9, further comprising:

reading the compressed count; and

determining from the value of the compressed count the number of bits of said generated random or pseudo-random number and said predetermined number to compare in said comparing.

12. The method of claim 9, wherein the compressed count is updated by incrementing its value by one.

13. The method of claim 9, wherein the compressed count is updated by decrementing its value by one.