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Frequency detection circuit for clock recovery

  • US 6,643,346 B1
  • Filed: 02/23/1999
  • Issued: 11/04/2003
  • Est. Priority Date: 02/23/1999
  • Status: Expired due to Term
First Claim
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1. A clock recovery circuit having a phase locked loop for recovering an underlying clock signal from an input data stream, said clock recovery circuit comprising:

  • a phase detector for providing an output signal having characteristics representative of the frequency difference between the frequency of the underlying clock signal and the frequency of the input data stream;

    a frequency detector, said frequency detector comprising a differentiator, a positive peak detector and a negative peak detector, said frequency detector responsive to said output signal of said phase detector, for providing an output signal corresponding to a magnitude of the frequency difference; and

    an integrator, responsive to said output signal of said frequency detector, for providing a slowly varying bipolar voltage output signal proportional to the frequency difference.

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